> -----Original Message----- > From: Borah, Chaitanya Kumar <[email protected]> > Sent: Tuesday, April 8, 2025 4:30 PM > To: [email protected]; [email protected] > Cc: [email protected]; Shankar, Uma <[email protected]>; > Borah, Chaitanya Kumar <[email protected]>; Manna, > Animesh <[email protected]> > Subject: [PATCH 03/11] drm/i915/dsb: Extract intel_dsb_{head,tail}() > > From: Ville Syrjälä <[email protected]> > > Extract the code that calculates the DSB_HEAD/TAIL register values into small > helpers. We already have two copies of this, and soon there will be a third. > > Signed-off-by: Ville Syrjälä <[email protected]>
Reviewed-by: Animesh Manna <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_dsb.c | 24 ++++++++++++++---------- > 1 file changed, 14 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c > b/drivers/gpu/drm/i915/display/intel_dsb.c > index 08e3bbea1a67..0de15e3a9a56 100644 > --- a/drivers/gpu/drm/i915/display/intel_dsb.c > +++ b/drivers/gpu/drm/i915/display/intel_dsb.c > @@ -237,6 +237,16 @@ static bool is_dsb_busy(struct intel_display *display, > enum pipe pipe, > return intel_de_read_fw(display, DSB_CTRL(pipe, dsb_id)) & > DSB_STATUS_BUSY; } > > +static unsigned int intel_dsb_head(struct intel_dsb *dsb) { > + return intel_dsb_buffer_ggtt_offset(&dsb->dsb_buf); > +} > + > +static unsigned int intel_dsb_tail(struct intel_dsb *dsb) { > + return intel_dsb_buffer_ggtt_offset(&dsb->dsb_buf) + dsb->free_pos > * > +4; } > + > static void intel_dsb_ins_align(struct intel_dsb *dsb) { > /* > @@ -625,7 +635,6 @@ static void _intel_dsb_chain(struct intel_atomic_state > *state, > struct intel_display *display = to_intel_display(state->base.dev); > struct intel_crtc *crtc = dsb->crtc; > enum pipe pipe = crtc->pipe; > - u32 tail; > > if (drm_WARN_ON(display->drm, dsb->id == chained_dsb->id)) > return; > @@ -633,8 +642,6 @@ static void _intel_dsb_chain(struct intel_atomic_state > *state, > if (!assert_dsb_tail_is_aligned(chained_dsb)) > return; > > - tail = chained_dsb->free_pos * 4; > - > intel_dsb_reg_write(dsb, DSB_CTRL(pipe, chained_dsb->id), > ctrl | DSB_ENABLE); > > @@ -655,10 +662,10 @@ static void _intel_dsb_chain(struct > intel_atomic_state *state, > } > > intel_dsb_reg_write(dsb, DSB_HEAD(pipe, chained_dsb->id), > - intel_dsb_buffer_ggtt_offset(&chained_dsb- > >dsb_buf)); > + intel_dsb_head(chained_dsb)); > > intel_dsb_reg_write(dsb, DSB_TAIL(pipe, chained_dsb->id), > - intel_dsb_buffer_ggtt_offset(&chained_dsb- > >dsb_buf) + tail); > + intel_dsb_tail(chained_dsb)); > > if (ctrl & DSB_WAIT_FOR_VBLANK) { > /* > @@ -703,13 +710,10 @@ static void _intel_dsb_commit(struct intel_dsb > *dsb, u32 ctrl, > struct intel_crtc *crtc = dsb->crtc; > struct intel_display *display = to_intel_display(crtc->base.dev); > enum pipe pipe = crtc->pipe; > - u32 tail; > > if (!assert_dsb_tail_is_aligned(dsb)) > return; > > - tail = dsb->free_pos * 4; > - > if (is_dsb_busy(display, pipe, dsb->id)) { > drm_err(display->drm, "[CRTC:%d:%s] DSB %d is busy\n", > crtc->base.base.id, crtc->base.name, dsb->id); @@ - > 727,7 +731,7 @@ static void _intel_dsb_commit(struct intel_dsb *dsb, u32 > ctrl, > dsb_error_int_en(display) | DSB_PROG_INT_EN); > > intel_de_write_fw(display, DSB_HEAD(pipe, dsb->id), > - intel_dsb_buffer_ggtt_offset(&dsb->dsb_buf)); > + intel_dsb_head(dsb)); > > if (hw_dewake_scanline >= 0) { > int diff, position; > @@ -749,7 +753,7 @@ static void _intel_dsb_commit(struct intel_dsb *dsb, > u32 ctrl, > } > > intel_de_write_fw(display, DSB_TAIL(pipe, dsb->id), > - intel_dsb_buffer_ggtt_offset(&dsb->dsb_buf) + tail); > + intel_dsb_tail(dsb)); > } > > /** > -- > 2.25.1
