Looking at the current if-ladder in intel_bw_init_hw(), we see that
Xe2_HPD contains two entries, differing only for ECC memories.  In an
upcoming change for Xe3p_LPD, we will have a similar case.

Let's improving readability by using braces and allowing adding extra
conditions for each case.

Signed-off-by: Gustavo Sousa <[email protected]>
---
 drivers/gpu/drm/i915/display/intel_bw.c | 29 +++++++++++++++--------------
 1 file changed, 15 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c 
b/drivers/gpu/drm/i915/display/intel_bw.c
index b53bcb693e79..8f5b86cd91b6 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -812,29 +812,30 @@ void intel_bw_init_hw(struct intel_display *display)
        if (!HAS_DISPLAY(display))
                return;
 
-       if (DISPLAY_VERx100(display) >= 3002)
+       if (DISPLAY_VERx100(display) >= 3002) {
                tgl_get_bw_info(display, dram_info, &xe3lpd_3002_sa_info);
-       else if (DISPLAY_VER(display) >= 30)
+       } else if (DISPLAY_VER(display) >= 30) {
                tgl_get_bw_info(display, dram_info, &xe3lpd_sa_info);
-       else if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx &&
-                dram_info->type == INTEL_DRAM_GDDR_ECC)
-               xe2_hpd_get_bw_info(display, dram_info, &xe2_hpd_ecc_sa_info);
-       else if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx)
-               xe2_hpd_get_bw_info(display, dram_info, &xe2_hpd_sa_info);
-       else if (DISPLAY_VER(display) >= 14)
+       } else if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx) {
+               if (dram_info->type == INTEL_DRAM_GDDR_ECC)
+                       xe2_hpd_get_bw_info(display, dram_info, 
&xe2_hpd_ecc_sa_info);
+               else
+                       xe2_hpd_get_bw_info(display, dram_info, 
&xe2_hpd_sa_info);
+       } else if (DISPLAY_VER(display) >= 14) {
                tgl_get_bw_info(display, dram_info, &mtl_sa_info);
-       else if (display->platform.dg2)
+       } else if (display->platform.dg2) {
                dg2_get_bw_info(display);
-       else if (display->platform.alderlake_p)
+       } else if (display->platform.alderlake_p) {
                tgl_get_bw_info(display, dram_info, &adlp_sa_info);
-       else if (display->platform.alderlake_s)
+       } else if (display->platform.alderlake_s) {
                tgl_get_bw_info(display, dram_info, &adls_sa_info);
-       else if (display->platform.rocketlake)
+       } else if (display->platform.rocketlake) {
                tgl_get_bw_info(display, dram_info, &rkl_sa_info);
-       else if (DISPLAY_VER(display) == 12)
+       } else if (DISPLAY_VER(display) == 12) {
                tgl_get_bw_info(display, dram_info, &tgl_sa_info);
-       else if (DISPLAY_VER(display) == 11)
+       } else if (DISPLAY_VER(display) == 11) {
                icl_get_bw_info(display, dram_info, &icl_sa_info);
+       }
 }
 
 static unsigned int intel_bw_crtc_num_active_planes(const struct 
intel_crtc_state *crtc_state)

-- 
2.51.0

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