From: Imre Deak <[email protected]> A follow-up change will need to retrieve the DDI port field from the register value, add a macro for this. Make things symmetric with setting the field in the register.
Signed-off-by: Imre Deak <[email protected]> Signed-off-by: Mika Kahola <[email protected]> --- drivers/gpu/drm/i915/display/intel_display_regs.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h index 9d71e26a4fa2..c14d3caa73a7 100644 --- a/drivers/gpu/drm/i915/display/intel_display_regs.h +++ b/drivers/gpu/drm/i915/display/intel_display_regs.h @@ -2349,8 +2349,13 @@ enum skl_power_gate { #define DDI_BUF_CTL_TC_PHY_OWNERSHIP REG_BIT(6) #define DDI_A_4_LANES REG_BIT(4) #define DDI_PORT_WIDTH_MASK REG_GENMASK(3, 1) +#define DDI_PORT_WIDTH_ENCODE(width) ((width) == 3 ? 4 : (width) - 1) +#define DDI_PORT_WIDTH_DECODE(regval) ((regval) == 4 ? 3 : (regval) + 1) #define DDI_PORT_WIDTH(width) REG_FIELD_PREP(DDI_PORT_WIDTH_MASK, \ - ((width) == 3 ? 4 : (width) - 1)) + DDI_PORT_WIDTH_ENCODE(width)) +#define DDI_PORT_WIDTH_GET(regval) DDI_PORT_WIDTH_DECODE(REG_FIELD_GET(DDI_PORT_WIDTH_MASK, \ + (regval))) + #define DDI_PORT_WIDTH_SHIFT 1 #define DDI_INIT_DISPLAY_DETECTED REG_BIT(0) -- 2.34.1
