The register at offset 0xfd0 was incorrectly named MCFG_MCR_SELECTOR. According to the hardware specification (Bspec), this register is actually called STEER_SEMAPHORE.
Rename the register definition and update its usage to match the official hardware documentation. No functional changes. Bspec: 67113 Signed-off-by: Nitin Gote <[email protected]> --- drivers/gpu/drm/i915/gt/intel_gt_mcr.c | 6 +++--- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 +-- drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +- 3 files changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c index c3afa321fe30..2d5ea5568b22 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c @@ -354,7 +354,7 @@ void intel_gt_mcr_lock(struct intel_gt *gt, unsigned long *flags) intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_GT); err = wait_for(intel_uncore_read_fw(gt->uncore, - MTL_STEER_SEMAPHORE) == 0x1, 100); + STEER_SEMAPHORE) == 0x1, 100); } /* @@ -393,7 +393,7 @@ void intel_gt_mcr_unlock(struct intel_gt *gt, unsigned long flags) spin_unlock_irqrestore(>->mcr_lock, flags); if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) { - intel_uncore_write_fw(gt->uncore, MTL_STEER_SEMAPHORE, 0x1); + intel_uncore_write_fw(gt->uncore, STEER_SEMAPHORE, 0x1); intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_GT); } @@ -418,7 +418,7 @@ void intel_gt_mcr_lock_sanitize(struct intel_gt *gt) lockdep_assert_not_held(>->mcr_lock); if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) - intel_uncore_write_fw(gt->uncore, MTL_STEER_SEMAPHORE, 0x1); + intel_uncore_write_fw(gt->uncore, STEER_SEMAPHORE, 0x1); } /** diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h index 7421ed18d8d1..2282c1f16f44 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h @@ -62,8 +62,7 @@ #define GMD_ID_GRAPHICS _MMIO(0xd8c) #define GMD_ID_MEDIA _MMIO(MTL_MEDIA_GSI_BASE + 0xd8c) -#define MCFG_MCR_SELECTOR _MMIO(0xfd0) -#define MTL_STEER_SEMAPHORE _MMIO(0xfd0) +#define STEER_SEMAPHORE _MMIO(0xfd0) #define MTL_MCR_SELECTOR _MMIO(0xfd4) #define SF_MCR_SELECTOR _MMIO(0xfd8) #define GEN8_MCR_SELECTOR _MMIO(0xfdc) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index ece88c612e27..594730f221b8 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -1405,7 +1405,7 @@ xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal) * we'll just steer to a hardcoded "2" since that value will work * everywhere. */ - __set_mcr_steering(wal, MCFG_MCR_SELECTOR, 0, 2); + __set_mcr_steering(wal, STEER_SEMAPHORE, 0, 2); __set_mcr_steering(wal, SF_MCR_SELECTOR, 0, 2); /* -- 2.25.1
