Xe3p_LPD has the same behavior as for Xe3_LPD with respect to DMC context data for pipes C and D, which are lost when their power wells are disabled. As such, let's extend the condition for Xe3_LPD in need_pipedmc_load_mmio() to also catch Xe3p_LPD.
Bspec: 68851 Reviewed-by: Matt Atwood <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Gustavo Sousa <[email protected]> --- drivers/gpu/drm/i915/display/intel_dmc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index 1b3a9b5608c0..ca70cc4932df 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.c +++ b/drivers/gpu/drm/i915/display/intel_dmc.c @@ -718,11 +718,11 @@ static bool need_pipedmc_load_program(struct intel_display *display) static bool need_pipedmc_load_mmio(struct intel_display *display, enum pipe pipe) { /* - * PTL: + * Xe3_LPD/Xe3p_LPD: * - pipe A/B DMC doesn't need save/restore * - pipe C/D DMC is in PG0, needs manual save/restore */ - if (DISPLAY_VER(display) == 30) + if (IS_DISPLAY_VER(display, 30, 35)) return pipe >= PIPE_C; /* -- 2.51.0
