On Thu, 06 Nov 2025, Ville Syrjala <[email protected]> wrote:
> From: Ville Syrjälä <[email protected]>
>
> There was a completely unjustified change to the cx0 powerdown
> timeout, and the way it was done now prevents future conversion
> to poll_timeout_us().
>
> Assuming there was some reason the bigger timeout let's nuke
> the old short timeout (XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_US)
> nd replace it with the bigger timeout
> (XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_MS).

Might mention the 2 us short timeout is to be in line with
intel_wait_for_register(). Though xe doesn't use that anyway.

Reviewed-by: Jani Nikula <[email protected]>

>
> v2: Go for the longer (ms) timeout in case it actually matters
>
> Signed-off-by: Ville Syrjälä <[email protected]>
> ---
>  drivers/gpu/drm/i915/display/intel_cx0_phy.c      | 2 +-
>  drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c 
> b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> index ddc26e383714..e8a96a60fdd6 100644
> --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> @@ -2830,7 +2830,7 @@ void intel_cx0_powerdown_change_sequence(struct 
> intel_encoder *encoder,
>       /* Update Timeout Value */
>       if (intel_de_wait_custom(display, buf_ctl2_reg,
>                                intel_cx0_get_powerdown_update(lane_mask), 0,
> -                              XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_US, 2, 
> NULL))
> +                              2, XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_MS, 
> NULL))
>               drm_warn(display->drm,
>                        "PHY %c failed to bring out of lane reset\n",
>                        phy_name(phy));
> diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h 
> b/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
> index 635b35669348..62db0fd99f4a 100644
> --- a/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
> @@ -80,7 +80,7 @@
>  #define XELPDP_PCLK_PLL_DISABLE_TIMEOUT_US           20
>  #define XELPDP_PORT_BUF_SOC_READY_TIMEOUT_US         100
>  #define XELPDP_PORT_RESET_START_TIMEOUT_US           5
> -#define XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_US              100
> +#define XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_MS              2
>  #define XELPDP_PORT_RESET_END_TIMEOUT                        15
>  #define XELPDP_REFCLK_ENABLE_TIMEOUT_US                      1

-- 
Jani Nikula, Intel

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