On Thu, 2025-11-27 at 19:50 +0200, Imre Deak wrote: > The minimum/maximum DSC input (i.e. pipe) and compressed (i.e. link) > BPP > limits are computed already in intel_dp_compute_config_limits(), so > there is no need to do this again in > mst_stream_dsc_compute_link_config() called later. Remove the > corresponding alignments from the latter function and use the > precomputed (aligned and within bounds) maximum pipe BPP and the > min/max > compressed BPP values instead as-is. > > Signed-off-by: Imre Deak <[email protected]>
Reviewed-by: Jouni Högander <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 48 +++---------------- > -- > 1 file changed, 6 insertions(+), 42 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c > b/drivers/gpu/drm/i915/display/intel_dp_mst.c > index e3f8679e95252..24f8e60df9ac1 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > @@ -463,57 +463,21 @@ static int > mst_stream_dsc_compute_link_config(struct intel_dp *intel_dp, > { > struct intel_display *display = to_intel_display(intel_dp); > struct intel_connector *connector = > to_intel_connector(conn_state->connector); > - int num_bpc; > - u8 dsc_bpc[3] = {}; > - int min_bpp, max_bpp, sink_min_bpp, sink_max_bpp; > - int min_compressed_bpp_x16, max_compressed_bpp_x16; > - int bpp_step_x16; > > - max_bpp = limits->pipe.max_bpp; > - min_bpp = limits->pipe.min_bpp; > - > - num_bpc = drm_dp_dsc_sink_supported_input_bpcs(connector- > >dp.dsc_dpcd, > - dsc_bpc); > - > - drm_dbg_kms(display->drm, "DSC Source supported min bpp %d > max bpp %d\n", > - min_bpp, max_bpp); > - > - sink_min_bpp = min_array(dsc_bpc, num_bpc) * 3; > - sink_max_bpp = max_array(dsc_bpc, num_bpc) * 3; > - > - drm_dbg_kms(display->drm, "DSC Sink supported min bpp %d max > bpp %d\n", > - sink_min_bpp, sink_max_bpp); > - > - if (min_bpp < sink_min_bpp) > - min_bpp = sink_min_bpp; > - > - if (max_bpp > sink_max_bpp) > - max_bpp = sink_max_bpp; > - > - crtc_state->pipe_bpp = max_bpp; > - > - min_compressed_bpp_x16 = limits->link.min_bpp_x16; > - max_compressed_bpp_x16 = limits->link.max_bpp_x16; > + crtc_state->pipe_bpp = limits->pipe.max_bpp; > > drm_dbg_kms(display->drm, > "DSC Sink supported compressed min bpp " > FXP_Q4_FMT " compressed max bpp " FXP_Q4_FMT "\n", > - FXP_Q4_ARGS(min_compressed_bpp_x16), > FXP_Q4_ARGS(max_compressed_bpp_x16)); > - > - bpp_step_x16 = intel_dp_dsc_bpp_step_x16(connector); > - > - max_compressed_bpp_x16 = min(max_compressed_bpp_x16, > fxp_q4_from_int(crtc_state->pipe_bpp) - bpp_step_x16); > - > - drm_WARN_ON(display->drm, !is_power_of_2(bpp_step_x16)); > - min_compressed_bpp_x16 = round_up(min_compressed_bpp_x16, > bpp_step_x16); > - max_compressed_bpp_x16 = round_down(max_compressed_bpp_x16, > bpp_step_x16); > + FXP_Q4_ARGS(limits->link.min_bpp_x16), > FXP_Q4_ARGS(limits->link.max_bpp_x16)); > > crtc_state->lane_count = limits->max_lane_count; > crtc_state->port_clock = limits->max_rate; > > return intel_dp_mtp_tu_compute_config(intel_dp, crtc_state, > conn_state, > - > min_compressed_bpp_x16, > - > max_compressed_bpp_x16, > - bpp_step_x16, true); > + limits- > >link.min_bpp_x16, > + limits- > >link.max_bpp_x16, > + > intel_dp_dsc_bpp_step_x16(connector), > + true); > } > > static int mode_hblank_period_ns(const struct drm_display_mode > *mode)
