On Thu, 2025-11-27 at 19:50 +0200, Imre Deak wrote:
> Move the initialization of the DSI DSC streams-per-pipe value to
> fill_dsc() next to where the corresponding (per-line) slice_count
> value
> is initialized. This allows converting the initialization to use the
> detailed slice configuration state in follow-up changes.
>
> Signed-off-by: Imre Deak <[email protected]>
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 6 ------
> drivers/gpu/drm/i915/display/intel_bios.c | 5 +++++
> 2 files changed, 5 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 90076839e7152..9aba3d813daae 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1624,12 +1624,6 @@ static int gen11_dsi_dsc_compute_config(struct
> intel_encoder *encoder,
> if (crtc_state->pipe_bpp < 8 * 3)
> return -EINVAL;
>
> - /* FIXME: split only when necessary */
> - if (crtc_state->dsc.slice_count > 1)
> - crtc_state->dsc.slice_config.streams_per_pipe = 2;
> - else
> - crtc_state->dsc.slice_config.streams_per_pipe = 1;
> -
> /* FIXME: initialize from VBT */
> vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index a639c5eb32459..e69fac4f5bdfe 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -3516,10 +3516,14 @@ static void fill_dsc(struct intel_crtc_state
> *crtc_state,
> * throughput etc. into account.
> *
> * Also, per spec DSI supports 1, 2, 3 or 4 horizontal
> slices.
> + *
> + * FIXME: split only when necessary
> */
> if (dsc->slices_per_line & BIT(2)) {
> + crtc_state->dsc.slice_config.streams_per_pipe = 2;
> crtc_state->dsc.slice_count = 4;
> } else if (dsc->slices_per_line & BIT(1)) {
> + crtc_state->dsc.slice_config.streams_per_pipe = 2;
fill_dsc is called by intel_bios_get_dsc_params. Is streams_per_pipe
really bios parameter? I see slices_per_line is in VBT.
Streams_per_pipe and existing slice_count are decided based on that. Is
that right place to make that decisions or should we leave that
decision to caller of intel_bios_get_dsc_params?
BR,
Jouni Högander
> crtc_state->dsc.slice_count = 2;
> } else {
> /* FIXME */
> @@ -3527,6 +3531,7 @@ static void fill_dsc(struct intel_crtc_state
> *crtc_state,
> drm_dbg_kms(display->drm,
> "VBT: Unsupported DSC slice
> count for DSI\n");
>
> + crtc_state->dsc.slice_config.streams_per_pipe = 1;
> crtc_state->dsc.slice_count = 1;
> }
>
