On Wed, Dec 10, 2025 at 06:31:02AM +0000, Hogander, Jouni wrote: > On Wed, 2025-12-10 at 08:23 +0200, Hogander, Jouni wrote: > > On Tue, 2025-12-09 at 20:26 +0200, Ville Syrjälä wrote: > > > On Thu, Dec 04, 2025 at 09:07:15AM +0200, Jouni Högander wrote: > > > > This patch set contains fixes for Selective Fetch async flip > > > > sequences. On async flip selective fetch is choosing full frame > > > > update. Also subsequent flip/update is still using full frame > > > > update > > > > to ensure plane with pending async flip is not taken in to > > > > selective > > > > fetch/update. > > > > > > > > v4: > > > > - rework if-else if to if-if > > > > - added comment updated > > > > - check crtc_state->async_flip_planes in > > > > psr2_sel_fetch_pipe_state_supported > > > > v3: > > > > - rebase > > > > - fix old_crtc_state->pipe_srcsz_early_tpt > > > > - fix using intel_atomic_get_new_crtc_state > > > > v2: > > > > - check also crtc_state->async_flip_planes in > > > > psr2_sel_fetch_plane_state_supported > > > > > > > > Jouni Högander (3): > > > > drm/i915/psr: Set plane id bit in crtc_state->async_flip_planes > > > > for > > > > PSR > > > > drm/i915/psr: Perform full frame update on async flip > > > > drm/i915/psr: Allow async flip when Selective Fetch enabled > > > > > > Series is > > > Reviewed-by: Ville Syrjälä <[email protected]> > > > > > > When testing this I saw that we get stuck into full frame mode > > > all the time. But that seems to be a pre-existing issues caused > > > by the broken selective fetch area calculation code. I suppose > > > now that I have a laptop with a PSR2 panel I might have to dig out > > > that branch of mine where I attempted to rewrite the whoile thing > > > and figure out what was wrong with it... > > > > > > > What is the SW setup you are using and what kind of testing you are > > doing? Could it be related to frontbuffer tracking? > > Also what is the HW/platform you are using?
This was a LNL. -- Ville Syrjälä Intel
