> -----Original Message-----
> From: Nikula, Jani <[email protected]>
> Sent: Thursday, January 22, 2026 5:30 PM
> To: Shankar, Uma <[email protected]>; [email protected];
> [email protected]
> Cc: [email protected]; Shankar, Uma <[email protected]>
> Subject: Re: [v2 10/19] drm/{i915, xe}: Remove i915_reg.h from g4x_dp.c
> 
> On Thu, 22 Jan 2026, Uma Shankar <[email protected]> wrote:
> > Move DE_IRQ_REGS to common header to make g4x_dp.c free from
> > i915_reg.h dependency.
> >
> > Signed-off-by: Uma Shankar <[email protected]>
> > ---
> >  drivers/gpu/drm/i915/display/g4x_dp.c            |  2 +-
> >  .../gpu/drm/i915/display/intel_display_regs.h    |  9 +++++++++
> >  drivers/gpu/drm/i915/i915_reg.h                  | 16 ----------------
> >  include/drm/intel/intel_gmd_common_regs.h        |  7 +++++++
> >  4 files changed, 17 insertions(+), 17 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
> > b/drivers/gpu/drm/i915/display/g4x_dp.c
> > index 4cb753177fd8..b2b63e811776 100644
> > --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> > +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> > @@ -8,9 +8,9 @@
> >  #include <linux/string_helpers.h>
> >
> >  #include <drm/drm_print.h>
> > +#include <drm/intel/intel_gmd_common_regs.h>
> >
> >  #include "g4x_dp.h"
> > -#include "i915_reg.h"
> >  #include "intel_audio.h"
> >  #include "intel_backlight.h"
> >  #include "intel_connector.h"
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h
> > b/drivers/gpu/drm/i915/display/intel_display_regs.h
> > index b26e6a4ee1c3..eabee5abc23b 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_regs.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
> > @@ -3104,4 +3104,13 @@ enum skl_power_gate {
> >  #define   MTL_N_OF_POPULATED_CH_MASK
>       REG_GENMASK(7, 4)
> >  #define   MTL_DDR_TYPE_MASK                        REG_GENMASK(3, 0)
> >
> > +#define DEISR   _MMIO(0x44000)
> > +#define DEIMR   _MMIO(0x44004)
> > +#define DEIIR   _MMIO(0x44008)
> > +#define DEIER   _MMIO(0x4400c)
> > +
> > +#define DE_IRQ_REGS                I915_IRQ_REGS(DEIMR, \
> > +                                         DEIER, \
> > +                                         DEIIR)
> > +
> >  #endif /* __INTEL_DISPLAY_REGS_H__ */ diff --git
> > a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 504ba9b2fb5b..c0c2fab99a47 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -728,15 +728,6 @@
> >  #define VLV_MASTER_IER                     _MMIO(0x4400c) /* Gunit master
> IER */
> >  #define   MASTER_INTERRUPT_ENABLE  (1 << 31)
> >
> > -#define DEISR   _MMIO(0x44000)
> > -#define DEIMR   _MMIO(0x44004)
> > -#define DEIIR   _MMIO(0x44008)
> > -#define DEIER   _MMIO(0x4400c)
> > -
> > -#define DE_IRQ_REGS                I915_IRQ_REGS(DEIMR, \
> > -                                         DEIER, \
> > -                                         DEIIR)
> > -
> >  #define GTISR   _MMIO(0x44010)
> >  #define GTIMR   _MMIO(0x44014)
> >  #define GTIIR   _MMIO(0x44018)
> > @@ -864,13 +855,6 @@
> >  #define   MASK_WAKEMEM                             REG_BIT(13)
> >  #define   DDI_CLOCK_REG_ACCESS                     REG_BIT(7)
> >
> > -/* PCH */
> > -
> > -#define SDEISR  _MMIO(0xc4000)
> > -#define SDEIMR  _MMIO(0xc4004)
> > -#define SDEIIR  _MMIO(0xc4008)
> > -#define SDEIER  _MMIO(0xc400c)
> > -
> >  /* Icelake PPS_DATA and _ECC DIP Registers.
> >   * These are available for transcoders B,C and eDP.
> >   * Adding the _A so as to reuse the _MMIO_TRANS2 diff --git
> > a/include/drm/intel/intel_gmd_common_regs.h
> > b/include/drm/intel/intel_gmd_common_regs.h
> > index 2214cee38cf7..c8b2b5b2739c 100644
> > --- a/include/drm/intel/intel_gmd_common_regs.h
> > +++ b/include/drm/intel/intel_gmd_common_regs.h
> > @@ -148,4 +148,11 @@
> >  #define I915_ASLE_INTERRUPT                                (1 << 0)
> >  #define I915_BSD_USER_INTERRUPT                            (1 << 25)
> >
> > +/* PCH */
> > +
> > +#define SDEISR  _MMIO(0xc4000)
> > +#define SDEIMR  _MMIO(0xc4004)
> > +#define SDEIIR  _MMIO(0xc4008)
> > +#define SDEIER  _MMIO(0xc400c)
> 
> These are only used by display and gvt. I don't know what we're going to do 
> about
> gvt in the long run, but at this point I'd be prepared to just include the 
> necessary
> display register headers directly. This is what we do with all the other 
> registers.
> There are no other users for these, and IMO shouldn't be in the common header.

Ok sure, will fix it.

Regards,
Uma Shankar

> BR,
> Jani.
> 
> > +
> >  #endif
> 
> --
> Jani Nikula, Intel

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