Program context latency for delayed vblank timings to create window2.
Signed-off-by: Animesh Manna <[email protected]>
---
drivers/gpu/drm/i915/display/intel_cmtg.c | 4 ++++
drivers/gpu/drm/i915/display/intel_cmtg_regs.h | 2 ++
2 files changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c
b/drivers/gpu/drm/i915/display/intel_cmtg.c
index 26adf70cdd00..cb1376f4c13f 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg.c
+++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
@@ -236,10 +236,14 @@ static void intel_cmtg_set_timings(const struct
intel_crtc_state *crtc_state)
void intel_cmtg_enable(const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
if (cpu_transcoder != TRANSCODER_A && cpu_transcoder != TRANSCODER_B)
return;
intel_cmtg_set_timings(crtc_state);
+
+ intel_de_write(display, TRANS_SET_CTX_LATENCY_CMTG(cpu_transcoder),
+ intel_de_read(display,
TRANS_SET_CONTEXT_LATENCY(display, cpu_transcoder)));
}
diff --git a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
index eab90415d0da..3cfd8eedb321 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
@@ -32,4 +32,6 @@
#define TRANS_VRR_VMIN_CMTG(id) _MMIO(0x6F434 + (id) * 0x100)
#define TRANS_VRR_FLIPLINE_CMTG(id) _MMIO(0x6F438 + (id) * 0x100)
+#define TRANS_SET_CTX_LATENCY_CMTG(id) _MMIO(0x6F07C + (id) * 0x100)
+
#endif /* __INTEL_CMTG_REGS_H__ */
--
2.29.0