Reviewed-by: Mika Kahola <mika.kah...@intel.com>
On Fri, 2015-09-25 at 16:38 +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrj...@linux.intel.com>
>
> The adjustead_mode crtc_ timings are what we will program into the hardware,
> so it's those timings we should be looking practically everywhere.
>
> The normal and crtc_ timings should differ only when stere doubling is
> used. In that case the normal timings are the orignal non-doubled
> timigns, and crtc_ timings are the doubled timings used by the hardware.
>
> The only case where we continue to look at the normal timings is when we
> pass the adjusted_mode to drm_match_{cea,hdmi}_mode() to find the VIC.
> drm_edid keeps the modes aronund in the non-double form only, so it
> needs the non-double timings to match against.
>
> Done with sed
> 's/adjusted_mode->\([vhVH]\)/adjusted_mode->crtc_\1/g'
> 's/adjusted_mode->clock/adjusted_mode->crtc_clock/g'
> with a manual s/VDisplay/vdisplay/ within the comment in intel_dvo.c
>
> v2: Update due to intel_dsi.c changes
>
> Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
> ---
> drivers/gpu/drm/i915/dvo_ivch.c | 8 ++---
> drivers/gpu/drm/i915/intel_audio.c | 4 +--
> drivers/gpu/drm/i915/intel_display.c | 4 +--
> drivers/gpu/drm/i915/intel_dp_mst.c | 2 +-
> drivers/gpu/drm/i915/intel_dsi.c | 30 +++++++++----------
> drivers/gpu/drm/i915/intel_dvo.c | 8 ++---
> drivers/gpu/drm/i915/intel_panel.c | 58
> ++++++++++++++++++------------------
> drivers/gpu/drm/i915/intel_sdvo.c | 4 +--
> 8 files changed, 59 insertions(+), 59 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/dvo_ivch.c b/drivers/gpu/drm/i915/dvo_ivch.c
> index 732ce87..e082f75 100644
> --- a/drivers/gpu/drm/i915/dvo_ivch.c
> +++ b/drivers/gpu/drm/i915/dvo_ivch.c
> @@ -414,16 +414,16 @@ static void ivch_mode_set(struct intel_dvo_device *dvo,
> vr40 = (VR40_STALL_ENABLE | VR40_VERTICAL_INTERP_ENABLE |
> VR40_HORIZONTAL_INTERP_ENABLE);
>
> - if (mode->hdisplay != adjusted_mode->hdisplay ||
> - mode->vdisplay != adjusted_mode->vdisplay) {
> + if (mode->hdisplay != adjusted_mode->crtc_hdisplay ||
> + mode->vdisplay != adjusted_mode->crtc_vdisplay) {
> uint16_t x_ratio, y_ratio;
>
> vr01 |= VR01_PANEL_FIT_ENABLE;
> vr40 |= VR40_CLOCK_GATING_ENABLE;
> x_ratio = (((mode->hdisplay - 1) << 16) /
> - (adjusted_mode->hdisplay - 1)) >> 2;
> + (adjusted_mode->crtc_hdisplay - 1)) >> 2;
> y_ratio = (((mode->vdisplay - 1) << 16) /
> - (adjusted_mode->vdisplay - 1)) >> 2;
> + (adjusted_mode->crtc_vdisplay - 1)) >> 2;
> ivch_write(dvo, VR42, x_ratio);
> ivch_write(dvo, VR41, y_ratio);
> } else {
> diff --git a/drivers/gpu/drm/i915/intel_audio.c
> b/drivers/gpu/drm/i915/intel_audio.c
> index 779f90c..e4c30e8 100644
> --- a/drivers/gpu/drm/i915/intel_audio.c
> +++ b/drivers/gpu/drm/i915/intel_audio.c
> @@ -74,13 +74,13 @@ static u32 audio_config_hdmi_pixel_clock(const struct
> drm_display_mode *adjusted
> int i;
>
> for (i = 0; i < ARRAY_SIZE(hdmi_audio_clock); i++) {
> - if (adjusted_mode->clock == hdmi_audio_clock[i].clock)
> + if (adjusted_mode->crtc_clock == hdmi_audio_clock[i].clock)
> break;
> }
>
> if (i == ARRAY_SIZE(hdmi_audio_clock)) {
> DRM_DEBUG_KMS("HDMI audio pixel clock setting for %d not found,
> falling back to defaults\n",
> - adjusted_mode->clock);
> + adjusted_mode->crtc_clock);
> i = 1;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index f8605b9..91f88e9 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4400,7 +4400,7 @@ int skl_update_scaler_crtc(struct intel_crtc_state
> *state)
> return skl_update_scaler(state, !state->base.active, SKL_CRTC_INDEX,
> &state->scaler_state.scaler_id, DRM_ROTATE_0,
> state->pipe_src_w, state->pipe_src_h,
> - adjusted_mode->hdisplay, adjusted_mode->vdisplay);
> + adjusted_mode->crtc_hdisplay, adjusted_mode->crtc_vdisplay);
> }
>
> /**
> @@ -6587,7 +6587,7 @@ static int intel_crtc_compute_config(struct intel_crtc
> *crtc,
> * WaPruneModeWithIncorrectHsyncOffset:ctg,elk,ilk,snb,ivb,vlv,hsw.
> */
> if ((INTEL_INFO(dev)->gen > 4 || IS_G4X(dev)) &&
> - adjusted_mode->hsync_start == adjusted_mode->hdisplay)
> + adjusted_mode->crtc_hsync_start == adjusted_mode->crtc_hdisplay)
> return -EINVAL;
>
> if (HAS_IPS(dev))
> diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
> b/drivers/gpu/drm/i915/intel_dp_mst.c
> index ff8ba55..cccf014 100644
> --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> @@ -78,7 +78,7 @@ static bool intel_dp_mst_compute_config(struct
> intel_encoder *encoder,
> return false;
> }
>
> - mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);
> + mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
>
> pipe_config->pbn = mst_pbn;
> slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c
> b/drivers/gpu/drm/i915/intel_dsi.c
> index b4d5213..4fb97c0 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -710,10 +710,10 @@ static void set_dsi_timings(struct drm_encoder *encoder,
>
> u16 hactive, hfp, hsync, hbp, vfp, vsync, vbp;
>
> - hactive = adjusted_mode->hdisplay;
> - hfp = adjusted_mode->hsync_start - adjusted_mode->hdisplay;
> - hsync = adjusted_mode->hsync_end - adjusted_mode->hsync_start;
> - hbp = adjusted_mode->htotal - adjusted_mode->hsync_end;
> + hactive = adjusted_mode->crtc_hdisplay;
> + hfp = adjusted_mode->crtc_hsync_start - adjusted_mode->crtc_hdisplay;
> + hsync = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
> + hbp = adjusted_mode->crtc_htotal - adjusted_mode->crtc_hsync_end;
>
> if (intel_dsi->dual_link) {
> hactive /= 2;
> @@ -724,9 +724,9 @@ static void set_dsi_timings(struct drm_encoder *encoder,
> hbp /= 2;
> }
>
> - vfp = adjusted_mode->vsync_start - adjusted_mode->vdisplay;
> - vsync = adjusted_mode->vsync_end - adjusted_mode->vsync_start;
> - vbp = adjusted_mode->vtotal - adjusted_mode->vsync_end;
> + vfp = adjusted_mode->crtc_vsync_start - adjusted_mode->crtc_vdisplay;
> + vsync = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
> + vbp = adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vsync_end;
>
> /* horizontal values are in terms of high speed byte clock */
> hactive = txbyteclkhs(hactive, bpp, lane_count,
> @@ -745,11 +745,11 @@ static void set_dsi_timings(struct drm_encoder *encoder,
> * whereas these values should be based on resolution.
> */
> I915_WRITE(BXT_MIPI_TRANS_HACTIVE(port),
> - adjusted_mode->hdisplay);
> + adjusted_mode->crtc_hdisplay);
> I915_WRITE(BXT_MIPI_TRANS_VACTIVE(port),
> - adjusted_mode->vdisplay);
> + adjusted_mode->crtc_vdisplay);
> I915_WRITE(BXT_MIPI_TRANS_VTOTAL(port),
> - adjusted_mode->vtotal);
> + adjusted_mode->crtc_vtotal);
> }
>
> I915_WRITE(MIPI_HACTIVE_AREA_COUNT(port), hactive);
> @@ -782,7 +782,7 @@ static void intel_dsi_prepare(struct intel_encoder
> *intel_encoder)
>
> DRM_DEBUG_KMS("pipe %c\n", pipe_name(intel_crtc->pipe));
>
> - mode_hdisplay = adjusted_mode->hdisplay;
> + mode_hdisplay = adjusted_mode->crtc_hdisplay;
>
> if (intel_dsi->dual_link) {
> mode_hdisplay /= 2;
> @@ -832,7 +832,7 @@ static void intel_dsi_prepare(struct intel_encoder
> *intel_encoder)
> I915_WRITE(MIPI_DPHY_PARAM(port), intel_dsi->dphy_reg);
>
> I915_WRITE(MIPI_DPI_RESOLUTION(port),
> - adjusted_mode->vdisplay << VERTICAL_ADDRESS_SHIFT |
> + adjusted_mode->crtc_vdisplay << VERTICAL_ADDRESS_SHIFT |
> mode_hdisplay << HORIZONTAL_ADDRESS_SHIFT);
> }
>
> @@ -878,13 +878,13 @@ static void intel_dsi_prepare(struct intel_encoder
> *intel_encoder)
> if (is_vid_mode(intel_dsi) &&
> intel_dsi->video_mode_format == VIDEO_MODE_BURST) {
> I915_WRITE(MIPI_HS_TX_TIMEOUT(port),
> - txbyteclkhs(adjusted_mode->htotal, bpp,
> + txbyteclkhs(adjusted_mode->crtc_htotal, bpp,
> intel_dsi->lane_count,
> intel_dsi->burst_mode_ratio) + 1);
> } else {
> I915_WRITE(MIPI_HS_TX_TIMEOUT(port),
> - txbyteclkhs(adjusted_mode->vtotal *
> - adjusted_mode->htotal,
> + txbyteclkhs(adjusted_mode->crtc_vtotal *
> + adjusted_mode->crtc_htotal,
> bpp, intel_dsi->lane_count,
> intel_dsi->burst_mode_ratio) + 1);
> }
> diff --git a/drivers/gpu/drm/i915/intel_dvo.c
> b/drivers/gpu/drm/i915/intel_dvo.c
> index 0bc8aa8..555afbc 100644
> --- a/drivers/gpu/drm/i915/intel_dvo.c
> +++ b/drivers/gpu/drm/i915/intel_dvo.c
> @@ -285,11 +285,11 @@ static void intel_dvo_pre_enable(struct intel_encoder
> *encoder)
> dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
>
> /*I915_WRITE(DVOB_SRCDIM,
> - (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
> - (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
> + (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
> + (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
> I915_WRITE(dvo_srcdim_reg,
> - (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
> - (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
> + (adjusted_mode->crtc_hdisplay <<
> DVO_SRCDIM_HORIZONTAL_SHIFT) |
> + (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
> /*I915_WRITE(DVOB, dvo_val);*/
> I915_WRITE(dvo_reg, dvo_val);
> }
> diff --git a/drivers/gpu/drm/i915/intel_panel.c
> b/drivers/gpu/drm/i915/intel_panel.c
> index 4294f605..2806049 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -113,51 +113,51 @@ intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
> x = y = width = height = 0;
>
> /* Native modes don't need fitting */
> - if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
> - adjusted_mode->vdisplay == pipe_config->pipe_src_h)
> + if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
> + adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
> goto done;
>
> switch (fitting_mode) {
> case DRM_MODE_SCALE_CENTER:
> width = pipe_config->pipe_src_w;
> height = pipe_config->pipe_src_h;
> - x = (adjusted_mode->hdisplay - width + 1)/2;
> - y = (adjusted_mode->vdisplay - height + 1)/2;
> + x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
> + y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
> break;
>
> case DRM_MODE_SCALE_ASPECT:
> /* Scale but preserve the aspect ratio */
> {
> - u32 scaled_width = adjusted_mode->hdisplay
> + u32 scaled_width = adjusted_mode->crtc_hdisplay
> * pipe_config->pipe_src_h;
> u32 scaled_height = pipe_config->pipe_src_w
> - * adjusted_mode->vdisplay;
> + * adjusted_mode->crtc_vdisplay;
> if (scaled_width > scaled_height) { /* pillar */
> width = scaled_height / pipe_config->pipe_src_h;
> if (width & 1)
> width++;
> - x = (adjusted_mode->hdisplay - width + 1) / 2;
> + x = (adjusted_mode->crtc_hdisplay - width + 1)
> / 2;
> y = 0;
> - height = adjusted_mode->vdisplay;
> + height = adjusted_mode->crtc_vdisplay;
> } else if (scaled_width < scaled_height) { /* letter */
> height = scaled_width / pipe_config->pipe_src_w;
> if (height & 1)
> height++;
> - y = (adjusted_mode->vdisplay - height + 1) / 2;
> + y = (adjusted_mode->crtc_vdisplay - height + 1)
> / 2;
> x = 0;
> - width = adjusted_mode->hdisplay;
> + width = adjusted_mode->crtc_hdisplay;
> } else {
> x = y = 0;
> - width = adjusted_mode->hdisplay;
> - height = adjusted_mode->vdisplay;
> + width = adjusted_mode->crtc_hdisplay;
> + height = adjusted_mode->crtc_vdisplay;
> }
> }
> break;
>
> case DRM_MODE_SCALE_FULLSCREEN:
> x = y = 0;
> - width = adjusted_mode->hdisplay;
> - height = adjusted_mode->vdisplay;
> + width = adjusted_mode->crtc_hdisplay;
> + height = adjusted_mode->crtc_vdisplay;
> break;
>
> default:
> @@ -182,7 +182,7 @@ centre_horizontally(struct drm_display_mode
> *adjusted_mode,
> blank_width = adjusted_mode->crtc_hblank_end -
> adjusted_mode->crtc_hblank_start;
> sync_pos = (blank_width - sync_width + 1) / 2;
>
> - border = (adjusted_mode->hdisplay - width + 1) / 2;
> + border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
> border += border & 1; /* make the border even */
>
> adjusted_mode->crtc_hdisplay = width;
> @@ -204,7 +204,7 @@ centre_vertically(struct drm_display_mode *adjusted_mode,
> blank_width = adjusted_mode->crtc_vblank_end -
> adjusted_mode->crtc_vblank_start;
> sync_pos = (blank_width - sync_width + 1) / 2;
>
> - border = (adjusted_mode->vdisplay - height + 1) / 2;
> + border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
>
> adjusted_mode->crtc_vdisplay = height;
> adjusted_mode->crtc_vblank_start = height + border;
> @@ -231,10 +231,10 @@ static void i965_scale_aspect(struct intel_crtc_state
> *pipe_config,
> u32 *pfit_control)
> {
> struct drm_display_mode *adjusted_mode =
> &pipe_config->base.adjusted_mode;
> - u32 scaled_width = adjusted_mode->hdisplay *
> + u32 scaled_width = adjusted_mode->crtc_hdisplay *
> pipe_config->pipe_src_h;
> u32 scaled_height = pipe_config->pipe_src_w *
> - adjusted_mode->vdisplay;
> + adjusted_mode->crtc_vdisplay;
>
> /* 965+ is easy, it does everything in hw */
> if (scaled_width > scaled_height)
> @@ -243,7 +243,7 @@ static void i965_scale_aspect(struct intel_crtc_state
> *pipe_config,
> else if (scaled_width < scaled_height)
> *pfit_control |= PFIT_ENABLE |
> PFIT_SCALING_LETTER;
> - else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w)
> + else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
> *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
> }
>
> @@ -252,10 +252,10 @@ static void i9xx_scale_aspect(struct intel_crtc_state
> *pipe_config,
> u32 *border)
> {
> struct drm_display_mode *adjusted_mode =
> &pipe_config->base.adjusted_mode;
> - u32 scaled_width = adjusted_mode->hdisplay *
> + u32 scaled_width = adjusted_mode->crtc_hdisplay *
> pipe_config->pipe_src_h;
> u32 scaled_height = pipe_config->pipe_src_w *
> - adjusted_mode->vdisplay;
> + adjusted_mode->crtc_vdisplay;
> u32 bits;
>
> /*
> @@ -269,9 +269,9 @@ static void i9xx_scale_aspect(struct intel_crtc_state
> *pipe_config,
> pipe_config->pipe_src_h);
>
> *border = LVDS_BORDER_ENABLE;
> - if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) {
> + if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
> bits = panel_fitter_scaling(pipe_config->pipe_src_h,
> - adjusted_mode->vdisplay);
> +
> adjusted_mode->crtc_vdisplay);
>
> *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
> bits << PFIT_VERT_SCALE_SHIFT);
> @@ -285,9 +285,9 @@ static void i9xx_scale_aspect(struct intel_crtc_state
> *pipe_config,
> pipe_config->pipe_src_w);
>
> *border = LVDS_BORDER_ENABLE;
> - if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
> + if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
> bits = panel_fitter_scaling(pipe_config->pipe_src_w,
> - adjusted_mode->hdisplay);
> +
> adjusted_mode->crtc_hdisplay);
>
> *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
> bits << PFIT_VERT_SCALE_SHIFT);
> @@ -315,8 +315,8 @@ void intel_gmch_panel_fitting(struct intel_crtc
> *intel_crtc,
> adjusted_mode = &pipe_config->base.adjusted_mode;
>
> /* Native modes don't need fitting */
> - if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
> - adjusted_mode->vdisplay == pipe_config->pipe_src_h)
> + if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
> + adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
> goto out;
>
> switch (fitting_mode) {
> @@ -342,8 +342,8 @@ void intel_gmch_panel_fitting(struct intel_crtc
> *intel_crtc,
> * Full scaling, even if it changes the aspect ratio.
> * Fortunately this is all done for us in hw.
> */
> - if (pipe_config->pipe_src_h != adjusted_mode->vdisplay ||
> - pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
> + if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
> + pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
> pfit_control |= PFIT_ENABLE;
> if (INTEL_INFO(dev)->gen >= 4)
> pfit_control |= PFIT_SCALING_AUTO;
> diff --git a/drivers/gpu/drm/i915/intel_sdvo.c
> b/drivers/gpu/drm/i915/intel_sdvo.c
> index ab75b61..9df6bbd 100644
> --- a/drivers/gpu/drm/i915/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/intel_sdvo.c
> @@ -605,9 +605,9 @@ log_fail:
>
> static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode
> *adjusted_mode)
> {
> - if (adjusted_mode->clock >= 100000)
> + if (adjusted_mode->crtc_clock >= 100000)
> return 1;
> - else if (adjusted_mode->clock >= 50000)
> + else if (adjusted_mode->crtc_clock >= 50000)
> return 2;
> else
> return 4;
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