On Thu, 5 Nov 2015 14:53:32 -0800 Matt Roper <matthew.d.ro...@intel.com> wrote:
> The bspec indicates that DDI A using four lanes is the only valid > configuration for Broxton (Broxton doesn't have a DDI E to split these > lanes with); the DDI_A_4_LANES bit of port A's DDI_BUF_CTL should always > be set by the BIOS. However some BIOS versions seem to only be setting > this bit if eDP is actually lit up at boot time; if the BIOS doesn't > turn on the eDP panel because an external display is plugged in, then > this bit is never properly initialized. The end result of this is that > we wind up calculating a lower max data rate than we should and may wind > up rejecting the native mode for panels that we should be able to drive. > > Let's workaround this BIOS bug by just turning the DDI_A_4_LANES bit on > in our driver's internal state if we recognize that're running on BXT > where it should have been on anyway. > > Cc: Imre Deak <imre.d...@intel.com> > Cc: Bob Paauwe <bob.j.paa...@intel.com> > Signed-off-by: Matt Roper <matthew.d.ro...@intel.com> > --- > drivers/gpu/drm/i915/intel_ddi.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c > b/drivers/gpu/drm/i915/intel_ddi.c > index b164122..672b86c 100644 > --- a/drivers/gpu/drm/i915/intel_ddi.c > +++ b/drivers/gpu/drm/i915/intel_ddi.c > @@ -3234,6 +3234,19 @@ void intel_ddi_init(struct drm_device *dev, enum port > port) > (DDI_BUF_PORT_REVERSAL | > DDI_A_4_LANES); > > + /* > + * Bspec says that DDI_A_4_LANES is the only supported configuration > + * for Broxton. Yet some BIOS fail to set this bit on port A if eDP > + * wasn't lit up at boot. Force this bit on in our internal > + * configuration so that we use the proper lane count for our > + * calculations. > + */ > + if (IS_BROXTON(dev) && port == PORT_A) > + if (!(intel_dig_port->saved_port_bits & DDI_A_4_LANES)) { > + DRM_DEBUG_KMS("BXT BIOS forgot to set DDI_A_4_LANES for port A; > fixing\n"); > + intel_dig_port->saved_port_bits |= DDI_A_4_LANES; > + } The brace isn't lined up with the proper if. > + > intel_encoder->type = INTEL_OUTPUT_UNKNOWN; > intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); > intel_encoder->cloneable = 0; With the above formatting fixed. Reviewed-by: Bob Paauwe <bob.j.paa...@intel.com> Tested-by: Bob Paauwe <bob.j.paa...@intel.com> -- -- Bob Paauwe bob.j.paa...@intel.com IOTG / PED Software Organization Intel Corp. Folsom, CA (916) 356-6193 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx