This patch make use of plane_wm variable directly instead of passing skl_plane_wm struct. this way reduces number of argument requirement in watermark calculation functions.
It also gives more freedom of decision making to implement Bspec WM workarounds. Signed-off-by: Kumar, Mahesh <mahesh1.ku...@intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 29 +++++++++++++++-------------- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index b2f17eb..5fa02cb 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3540,9 +3540,7 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, struct intel_plane_state *intel_pstate, uint16_t ddb_allocation, int level, - uint16_t *out_blocks, /* out */ - uint8_t *out_lines, /* out */ - bool *enabled /* out */) + struct skl_pipe_wm *pipe_wm) { struct drm_plane_state *pstate = &intel_pstate->base; struct drm_framebuffer *fb = pstate->fb; @@ -3555,6 +3553,11 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, uint32_t width = 0, height = 0; uint32_t plane_pixel_rate; uint32_t linetime_us = 0; + int id = skl_wm_plane_id(to_intel_plane(pstate->plane)); + struct skl_wm_level *result = &pipe_wm->wm[level]; + uint16_t *out_blocks = &result->plane_res_b[id]; + uint8_t *out_lines = &result->plane_res_l[id]; + bool *enabled = &result->plane_en[id]; if (latency == 0 || !cstate->base.active || !intel_pstate->base.visible) { *enabled = false; @@ -3655,7 +3658,7 @@ skl_compute_wm_level(const struct drm_i915_private *dev_priv, struct skl_ddb_allocation *ddb, struct intel_crtc_state *cstate, int level, - struct skl_wm_level *result) + struct skl_pipe_wm *pipe_wm) { struct drm_atomic_state *state = cstate->base.state; struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc); @@ -3666,12 +3669,6 @@ skl_compute_wm_level(const struct drm_i915_private *dev_priv, enum pipe pipe = intel_crtc->pipe; int ret; - /* - * We'll only calculate watermarks for planes that are actually - * enabled, so make sure all other planes are set as disabled. - */ - memset(result, 0, sizeof(*result)); - for_each_intel_plane_mask(&dev_priv->drm, intel_plane, cstate->base.plane_mask) { @@ -3709,9 +3706,7 @@ skl_compute_wm_level(const struct drm_i915_private *dev_priv, intel_pstate, ddb_blocks, level, - &result->plane_res_b[i], - &result->plane_res_l[i], - &result->plane_en[i]); + pipe_wm); if (ret) return ret; } @@ -3759,9 +3754,15 @@ static int skl_build_pipe_wm(struct intel_crtc_state *cstate, int level, max_level = ilk_wm_max_level(dev); int ret; + /* + * We'll only calculate watermarks for planes that are actually + * enabled, so make sure all other planes are set as disabled. + */ + memset(pipe_wm, 0, sizeof(*pipe_wm)); + for (level = 0; level <= max_level; level++) { ret = skl_compute_wm_level(dev_priv, ddb, cstate, - level, &pipe_wm->wm[level]); + level, pipe_wm); if (ret) return ret; } -- 2.8.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx