From: Karol Kolacinski <karol.kolacin...@intel.com>

Add a helper function to print new/current TSPLL config. This helps
avoid unnecessary casts from u8 to enums.

Reviewed-by: Michal Kubiak <michal.kub...@intel.com>
Reviewed-by: Milena Olech <milena.ol...@intel.com>
Signed-off-by: Karol Kolacinski <karol.kolacin...@intel.com>
---
 drivers/net/ethernet/intel/ice/ice_tspll.c | 54 +++++++++++++++++-------------
 1 file changed, 30 insertions(+), 24 deletions(-)

diff --git a/drivers/net/ethernet/intel/ice/ice_tspll.c 
b/drivers/net/ethernet/intel/ice/ice_tspll.c
index 
cf0e37296796c5bbda011d027dc8ef007b0e2021..08af4ced50eb877dce5944d87a90d0dcdb49ff2e
 100644
--- a/drivers/net/ethernet/intel/ice/ice_tspll.c
+++ b/drivers/net/ethernet/intel/ice/ice_tspll.c
@@ -89,6 +89,26 @@ static const char *ice_tspll_clk_src_str(enum ice_clk_src 
clk_src)
        }
 }
 
+/**
+ * ice_tspll_log_cfg - Log current/new TSPLL configuration
+ * @hw: Pointer to the HW struct
+ * @enable: CGU enabled/disabled
+ * @clk_src: Current clock source
+ * @tspll_freq: Current clock frequency
+ * @lock: CGU lock status
+ * @new_cfg: true if this is a new config
+ */
+static void ice_tspll_log_cfg(struct ice_hw *hw, bool enable, u8 clk_src,
+                             u8 tspll_freq, bool lock, bool new_cfg)
+{
+       dev_dbg(ice_hw_to_dev(hw),
+               "%s TSPLL configuration -- %s, src %s, freq %s, PLL %s\n",
+               new_cfg ? "New" : "Current", str_enabled_disabled(enable),
+               ice_tspll_clk_src_str((enum ice_clk_src)clk_src),
+               ice_tspll_clk_freq_str((enum ice_tspll_freq)tspll_freq),
+               lock ? "locked" : "unlocked");
+}
+
 /**
  * ice_tspll_cfg_e82x - Configure the Clock Generation Unit TSPLL
  * @hw: Pointer to the HW struct
@@ -144,12 +164,9 @@ static int ice_tspll_cfg_e82x(struct ice_hw *hw, enum 
ice_tspll_freq clk_freq,
        if (err)
                return err;
 
-       /* Log the current clock configuration */
-       ice_debug(hw, ICE_DBG_PTP, "Current TSPLL configuration -- %s, clk_src 
%s, clk_freq %s, PLL %s\n",
-                 str_enabled_disabled(dw24.ts_pll_enable),
-                 ice_tspll_clk_src_str(dw24.time_ref_sel),
-                 ice_tspll_clk_freq_str(dw9.time_ref_freq_sel),
-                 bwm_lf.plllock_true_lock_cri ? "locked" : "unlocked");
+       ice_tspll_log_cfg(hw, dw24.ts_pll_enable, dw24.time_ref_sel,
+                         dw9.time_ref_freq_sel, bwm_lf.plllock_true_lock_cri,
+                         false);
 
        /* Disable the PLL before changing the clock source or frequency */
        if (dw24.ts_pll_enable) {
@@ -222,12 +239,8 @@ static int ice_tspll_cfg_e82x(struct ice_hw *hw, enum 
ice_tspll_freq clk_freq,
                return -EBUSY;
        }
 
-       /* Log the current clock configuration */
-       ice_debug(hw, ICE_DBG_PTP, "New TSPLL configuration -- %s, clk_src %s, 
clk_freq %s, PLL %s\n",
-                 str_enabled_disabled(dw24.ts_pll_enable),
-                 ice_tspll_clk_src_str(dw24.time_ref_sel),
-                 ice_tspll_clk_freq_str(dw9.time_ref_freq_sel),
-                 bwm_lf.plllock_true_lock_cri ? "locked" : "unlocked");
+       ice_tspll_log_cfg(hw, dw24.ts_pll_enable, clk_src, clk_freq, true,
+                         true);
 
        return 0;
 }
@@ -316,12 +329,9 @@ static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum 
ice_tspll_freq clk_freq,
        if (err)
                return err;
 
-       /* Log the current clock configuration */
-       ice_debug(hw, ICE_DBG_PTP, "Current TSPLL configuration -- %s, clk_src 
%s, clk_freq %s, PLL %s\n",
-                 str_enabled_disabled(dw23.ts_pll_enable),
-                 ice_tspll_clk_src_str(dw23.time_ref_sel),
-                 ice_tspll_clk_freq_str(dw9.time_ref_freq_sel),
-                 ro_lock.plllock_true_lock_cri ? "locked" : "unlocked");
+       ice_tspll_log_cfg(hw, dw23.ts_pll_enable, dw23.time_ref_sel,
+                         dw9.time_ref_freq_sel,
+                         ro_lock.plllock_true_lock_cri, false);
 
        /* Disable the PLL before changing the clock source or frequency */
        if (dw23.ts_pll_enable) {
@@ -414,12 +424,8 @@ static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum 
ice_tspll_freq clk_freq,
                return -EBUSY;
        }
 
-       /* Log the current clock configuration */
-       ice_debug(hw, ICE_DBG_PTP, "New TSPLL configuration -- %s, clk_src %s, 
clk_freq %s, PLL %s\n",
-                 str_enabled_disabled(dw23.ts_pll_enable),
-                 ice_tspll_clk_src_str(dw23.time_ref_sel),
-                 ice_tspll_clk_freq_str(dw9.time_ref_freq_sel),
-                 ro_lock.plllock_true_lock_cri ? "locked" : "unlocked");
+       ice_tspll_log_cfg(hw, dw23.ts_pll_enable, clk_src, clk_freq, true,
+                         true);
 
        return 0;
 }

-- 
2.48.1.397.gec9d649cc640

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