From: Karol Kolacinski <[email protected]> The ETH56G MAC register configuration Rx offset field stores a signed integer, not an unsigned one. Correct the struct comment that incorrectly described it as '11 bit unsigned int'. Also update 'unsigned ints' to 'unsigned integers' for consistency.
Signed-off-by: Karol Kolacinski <[email protected]> Signed-off-by: Aleksandr Loktionov <[email protected]> --- drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h index 9bfd3e7..c1aa408 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h @@ -144,9 +144,9 @@ struct ice_vernier_info_e82x { * @tx_offset: total Tx offset, fixed point * @rx_offset: total Rx offset, contains value for bitslip/deskew, fixed point * - * All fixed point registers except Rx offset are 23 bit unsigned ints with + * All fixed point registers except Rx offset are 23 bit unsigned integers with * a 9 bit fractional. - * Rx offset is 11 bit unsigned int with a 9 bit fractional. + * Rx offset is 11 bit signed integer with a 9 bit fractional. */ struct ice_eth56g_mac_reg_cfg { struct { -- 2.52.0
