> -----Original Message----- > From: Intel-wired-lan <[email protected]> On Behalf Of > Grzegorz Nitka > Sent: Monday, August 3, 2026 4:35 AM > To: [email protected] > Cc: Kitszel, Przemyslaw <[email protected]>; > [email protected]; [email protected]; Kubalewski, Arkadiusz > <[email protected]>; Korba, Przemyslaw > <[email protected]>; [email protected]; [email protected]; > Nguyen, Anthony L <[email protected]>; [email protected]; > [email protected]; [email protected]; [email protected] > Subject: [Intel-wired-lan] [PATCH v3 iwl-next 3/3] ice: use per-interface > clock_id for E825 generic DPLLs > > On E825, the TX-CLK and TSPLL DPLL devices are registered as > DPLL_TYPE_GENERIC. Their clock_id was derived from the board-level PCIe DSN, > which is identical for all interfaces sharing the same NAC/quad. As a > > result, userspace (e.g. 'dpll device show') reports several DPLL devices with > the same clock_id and no board or signal label, making it impossible to > unambiguously map a DPLL device to the interface it belongs to. > > Since these DPLLs are per-interface, use the permanent port MAC as the > clock_id basis for E825 generic DPLLs: > > * TX-CLK uses the plain MAC-derived value. > * TSPLL on the source-timer owner PF uses the same MAC-derived > value with a dedicated tag bit, so it stays distinct from > TX-CLK while remaining stable per interface. > > Other DPLL objects (EEC/PPS and non-E825 paths) keep the board DSN-derived > clock_id. When the permanent MAC is not yet valid, fall back to the existing > board-level clock_id to preserve init behavior. > > Reviewed-by: Przemyslaw Korba <[email protected]> > Signed-off-by: Grzegorz Nitka <[email protected]> > --- > drivers/net/ethernet/intel/ice/ice_dpll.c | 81 +++++++++++++++++++++-- > 1 file changed, 76 insertions(+), 5 deletions(-)
Tested-by: Alexander Nowlin <[email protected]>
