2015-01-09 16:18+0100, Paolo Bonzini: > On 09/01/2015 16:12, Radim Krčmář wrote: > > > The chipset doesn't support it. :( > > > > I meant that we need to recompute PI entries for lowest priority > > interrupts every time guest's TPR changes. > > > > Luckily, Linux doesn't use TPR, but other OS might be a reason to drop > > lowest priority from PI optimizations. (Or make it more complicated.) > > Doing vector hashing is a possibility as well. I would like to know > what existing chipsets do in practice, then we can mimic it.
When looking at /proc/interrupts from time to time, I have only seen interrupts landing on the first CPU of the set. We could also distinguish between AMD and Intel ... AMD should deliver to the highest APIC ID. (If we still need to decide after focus processor and APR checks.) I'll try to check using a more trustworthy approach. _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
