2015-01-13 00:27+0000, Wu, Feng:
> > On 09/01/2015 15:54, Radim Krčmář wrote:
> > > There are two points relevant to this patch in new KVM's implementation,
> > > ("KVM: x86: amend APIC lowest priority arbitration",
> > > https://lkml.org/lkml/2015/1/9/362)
> > >
> > > 1) lowest priority depends on TPR
> > > 2) there is no need for balancing
> > >
> > > (1) has to be considered with PI as well.
> >
> > The chipset doesn't support it. :(
> >
> > > I kept (2) to avoid whining from people building on that behaviour, but
> > > lowest priority backed by PI could be transparent without it.
> > >
> > > Patch below removes the balancing, but I am not sure this is a price we
> > > allowed ourselves to pay ... what are your opinions?
> >
> > I wouldn't mind, but it requires a lot of benchmarking.
>
> In fact, the real hardware may do lowest priority in round robin way,
Yes, but we won't emulate round robin with PI and I think it is wrong to
have backends with significantly different guest-visible behaviors.
> the new
> hardware even doesn't consider the TPR for lowest priority interrupts
> delivery.
A bold move ... what hardware was the first to do so?
> As discussed with Paolo before, I will submit a patch to support lowest
> priority for PI
> after this series is merged.
Sure, I see only two good solutions though
1) don't optimize lowest priority with PI
2) don't balance lowest priority
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
