On 28/03/18 20:23, Heinrich Schuchardt wrote:
00000000 <efi_devpath_end>: 0: 7803 ldrb r3, [r0, #0] <<< Reading on byte 2: 2b7f cmp r3, #127 ; 0x7f 4: d100 bne.n 8 <efi_devpath_end+0x8> 6: 4770 bx lr 8: 8843 ldrh r3, [r0, #2] <<< Reading two bytes infocenter.arm.com/help/topic/com.arm.doc.faqs/ka15414.html LDRH/STRH - address must be 2-byte aligned.a: 4418 add r0, r3 c: e7f8 b.n 0 <efi_devpath_end>
Thanks. The compiler is indeed creating a single ldrh instruction. This indicates that the compiler believes that unaligned accesses are permitted, and so is optimising away the two byte loads to a single word load.
You can try building with -mno-unaligned-access; this should cause the compiler to emit byte-by-byte accesses for anything that is potentially unaligned. This is likely to substantially increase the code size, and decrease execution speed.
As in my other e-mail: your best option is probably to enable the MMU and fix up unaligned accesses as they occur. That way you will at least avoid the penalty for accesses that are correctly aligned.
Michael _______________________________________________ ipxe-devel mailing list ipxe-devel@lists.ipxe.org https://lists.ipxe.org/mailman/listinfo.cgi/ipxe-devel
