On 2018-09-05 18:16, Giovani Gracioli wrote:
Hi,
I am playing around IPI among non-root cells (I know it breaks the isolation
among cells, but I would like to understand the steps). I forced a call to
irqchip_set_pending from CPU 3 to CPU 2 in the gic_handle_sgir_write() function:
irqchip_set_pending(per_cpu(2), sgi->id);
sgi->id is 15. I can see that CPU 2 receives the IPI:
CPU 2 received an SGI 0
irqchip_inject_pending irq_id = 15, sender 3
gicv2_inject_irq() sender = 3, irq_id = 15
CPU 2 writing 268438543 to lr reg (first_free = 0)
However, the non-root cell does not receive the IPI (I am running Erika on it).
I do not know in which IRQ number the SGI ID 15 is mapped to. What is the
relation of pin_base and pin_bitmap from the config file with SGIs? What value
should I write in the irqchips config?
There is no mapping (and no permission checks - you bypassed them)
involved with this SGI. It is SGI 15 also on the receiver guest side.
Did your receiver enable that line for sure?
Jan
--
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux
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