Hello everyone, Lately i've tried to configure the recent Ultra96 cells to use IVHSMEM memory region between them. I can enable the root cell (ultra96-ivshmem.cell) but when I try to create the non-root cell (ultra96-gic-demo-ivshmem.cell), the system freezes and i can't input any character to console.
Here is the output after inputing "jailhouse cell create ultra96-gic-demo-ivshmem.cell": [ 80.464769] CPU3: shutdown [ 80.467397] psci: CPU3 killed. Adding virtual PCI device 00:00.0 to cell "gic-demo-ivshmem" Shared memory connection established: "gic-demo-ivshmem" <--> "Ultra96" Created cell "gic-demo-ivshmem" Page pool usage after cell creation: mem 75/996, remap 5/131072 [ 80.491250] Created Jailhouse cell "gic-demo-ivshmem" -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
/* * Jailhouse, a Linux-based partitioning hypervisor * * Configuration for gic-demo inmate on Avnet Ultra96 board: * 1 CPU, 64K RAM, 1 serial port * * Copyright (c) Siemens AG, 2016-2019 * * Authors: * Jan Kiszka <[email protected]> * * This work is licensed under the terms of the GNU GPL, version 2. See * the COPYING file in the top-level directory. */ #include <jailhouse/types.h> #include <jailhouse/cell-config.h> #define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0]) struct { struct jailhouse_cell_desc cell; __u64 cpus[1]; struct jailhouse_memory mem_regions[4]; struct jailhouse_irqchip irqchips[1]; struct jailhouse_pci_device pci_devices[1]; } __attribute__((packed)) config = { .cell = { .signature = JAILHOUSE_CELL_DESC_SIGNATURE, .revision = JAILHOUSE_CONFIG_REVISION, .name = "gic-demo-ivshmem", .flags = JAILHOUSE_CELL_PASSIVE_COMMREG, .cpu_set_size = sizeof(config.cpus), .num_memory_regions = ARRAY_SIZE(config.mem_regions), .num_irqchips = ARRAY_SIZE(config.irqchips), //.pio_bitmap_size = 0, .num_pci_devices = ARRAY_SIZE(config.pci_devices), .vpci_irq_base = 140-32, .console = { .address = 0xff010000, .type = JAILHOUSE_CON_TYPE_XUARTPS, .flags = JAILHOUSE_CON_ACCESS_MMIO | JAILHOUSE_CON_REGDIST_4, }, }, .cpus = { 0x8, }, .mem_regions = { /* UART */ { .phys_start = 0xff010000, .virt_start = 0xff010000, .size = 0x1000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, }, /* RAM */ { .phys_start = 0x7bfe0000, .virt_start = 0, .size = 0x00010000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, }, /* communication region */ { .virt_start = 0x80000000, .size = 0x00001000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_COMM_REGION, }, /* IVSHMEM shared memory region for 00:00.0 */ { //alterei phys_start para cima pq RAM atropelava IVSHMEM .phys_start = 0x80001000, .virt_start = 0x80001000, .size = 0x100000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_ROOTSHARED, }, }, .irqchips = { /* GIC */ { .address = 0xf9010000, .pin_base = 32, .pin_bitmap = { 1 << (54 - 32), 0, 0, (1 << (140 - 128)) | (1 << (142 - 128)) }, }, }, .pci_devices = { /* 00:00.0 */ { .type = JAILHOUSE_PCI_TYPE_IVSHMEM, .bdf = 0, .bar_mask = { 0xffffff00, 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }, .shmem_region = 3, .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED, .num_msix_vectors = 1, }, }, };
/* * Jailhouse, a Linux-based partitioning hypervisor * * Configuration for Avnet Ultra96 board * * Copyright (c) Siemens AG, 2016-2019 * * Authors: * Jan Kiszka <[email protected]> * * This work is licensed under the terms of the GNU GPL, version 2. See * the COPYING file in the top-level directory. */ #include <jailhouse/types.h> #include <jailhouse/cell-config.h> #define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0])) struct { struct jailhouse_system header; __u64 cpus[1]; struct jailhouse_memory mem_regions[3]; struct jailhouse_irqchip irqchips[1]; struct jailhouse_pci_device pci_devices[1]; } __attribute__((packed)) config = { .header = { .signature = JAILHOUSE_SYSTEM_SIGNATURE, .revision = JAILHOUSE_CONFIG_REVISION, .flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE, .hypervisor_memory = { .phys_start = 0x7c000000, .size = 0x00400000, }, .debug_console = { .address = 0xff010000, .size = 0x1000, .type = JAILHOUSE_CON_TYPE_XUARTPS, .flags = JAILHOUSE_CON_ACCESS_MMIO | JAILHOUSE_CON_REGDIST_4, }, .platform_info = { .pci_mmconfig_base = 0xfc000000, .pci_mmconfig_end_bus = 0, .pci_is_virtual = 1, .arm = { .gic_version = 2, .gicd_base = 0xf9010000, .gicc_base = 0xf902f000, .gich_base = 0xf9040000, .gicv_base = 0xf906f000, .maintenance_irq = 25, }, }, .root_cell = { .name = "Ultra96", .cpu_set_size = sizeof(config.cpus), .num_memory_regions = ARRAY_SIZE(config.mem_regions), .num_irqchips = ARRAY_SIZE(config.irqchips), .num_pci_devices = ARRAY_SIZE(config.pci_devices), .vpci_irq_base = 136-32, }, }, .cpus = { 0xf, }, .mem_regions = { /* MMIO (permissive) */ { .phys_start = 0xfd000000, .virt_start = 0xfd000000, .size = 0x03000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* RAM */ { .phys_start = 0x0, .virt_start = 0x0, .size = 0x7c000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* IVSHMEM shared memory region for 00:00.0 */ { .phys_start = 0x80001000, .virt_start = 0x80001000, .size = 0x100000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_ROOTSHARED, }, }, .irqchips = { /* GIC */ { .address = 0xf9010000, .pin_base = 32, .pin_bitmap = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, }, }, }, .pci_devices = { /* 0001:00:00.0 */ { .type = JAILHOUSE_PCI_TYPE_IVSHMEM, .iommu = 1, .domain = 1, .bdf = 0, .bar_mask = { 0xffffff00, 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }, .shmem_region = 2, .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED, .num_msix_vectors = 1, }, }, };
