Author: sebastien.lelong
Date: Sun Jun 7 02:08:40 2009
New Revision: 1034
Added:
trunk/include/peripheral/adc/adc_clock.jal
trunk/test/unittest/16f877_adc.jalt
Modified:
trunk/include/jal/unittest.jal
trunk/include/peripheral/adc/adc.jal
trunk/test/unittest/16f88_adc.jalt
trunk/tools/jallib.py
Log:
ADC: split clock config into separated file, fixed clock selection bits
computation, express ADC_MIN_TAD and ADC_MAX_TAD as usecs * 10 because
compiler can not handle floats and sometimes it has to be that accurate.
jallib/unittesting: can now pass a testcase name as arguments to
specifically run it, add jalt file for 16f877
Modified: trunk/include/jal/unittest.jal
==============================================================================
--- trunk/include/jal/unittest.jal (original)
+++ trunk/include/jal/unittest.jal Sun Jun 7 02:08:40 2009
@@ -15,3 +15,8 @@
procedure test_byte(byte in t) is
end procedure
+procedure test_word(word in t) is
+end procedure
+
+procedure test_dword(dword in t) is
+end procedure
Modified: trunk/include/peripheral/adc/adc.jal
==============================================================================
--- trunk/include/peripheral/adc/adc.jal (original)
+++ trunk/include/peripheral/adc/adc.jal Sun Jun 7 02:08:40 2009
@@ -7,17 +7,16 @@
-- Released under the ZLIB license
(http://www.opensource.org/licenses/zlib-license.html)
--
-- Description: library to handle ADC peripheral.
--- Current status:
--- - support both low and high resolution mode
--- - support a large number of PICs (see adc_pindef.jal for more):
--- - ADC pin configuration
--- - channel selection
--- - clock selection
--- - support Vref
+-- - support both low and high resolution mode
+-- - support a large number of PICs (see adc_pindef.jal for more):
+-- - ADC pin configuration
+-- - channel selection
+-- - clock selection
+-- - support Vref
--
-- Notes: this is a heavy refactoring/rewriting of original library from
Stef Mientki.
-- The main changes are about ADC configuration, which are essentially
handled in
--- adc_channels.jal and adc_pindef.jal
+-- adc_channels.jal, adc_pindef.jal and adc_clock.jal
-- --
-- The original library can be found:
-- - Stef's:
http://mientki.ruhosting.nl/pic-tools/jal/libs2/adc_hardware.jal
@@ -31,17 +30,10 @@
-- specific to the selected chip
include adc_channels
+-- include clock selection bits specific procedures
+include adc_clock
--- Default min/max Tad value
--- See adc_init for details
-if defined(ADC_MIN_TAD) == false then
- const byte ADC_MIN_TAD = 2
-end if
-if defined(ADC_MAX_TAD) == false then
- const byte ADC_MAX_TAD = 6
-end if
-
-- By default Rsource is max
if defined(ADC_RSOURCE) == false then
const word ADC_RSOURCE = 10_000
@@ -147,17 +139,6 @@
end function
-function adc_eval_tad(byte in factor) return bit is
- var byte tad_value = 0
- var bit tad_ok = false
- tad_value = factor / (target_clock / 1_000_000)
- if tad_value >= ADC_MIN_TAD & tad_value < ADC_MAX_TAD then
- tad_ok = true
- end if
- return tad_ok
-end function
-
-
procedure _adc_init_justify() is
-- Seb: justification is done through ADFM bits
-- They can be found in:
@@ -189,114 +170,6 @@
JALLIB_ADFM = 0
end if
-end procedure
-
-
-procedure _adc_init_clock() is
- -- Seb: selecting the appropriate clock bits
- -- is a real nightmare, yet critical.
- -- Strictly speaking, all PICs don't have the same
- -- value in min/max Tad. And some PICs can go higher than
- -- 20MHz, like 18F. And, LF PICs don't follow the same rules as
- -- F PICs (see 18F4550 and 18LF4550 for instance)
- -- How to get a general rule of thumb ?...
- --
- -- Well... I got an idea !
- -- For 16F88, and for many other PICs: 1.6usec < Tad < 6.4usec
- -- For 18F4550 (and other 18F PICs ?): 0.7usec < Tad < 25usec
- -- So, honoring 16F88 values should do the trick for 18F4550, right ?
- -- We then just need to compute Tad from the highest possible clock
value,
- -- and decreasing until Tad interval is match.
-
- -- Oh, I forgot ! clock selection bits can *2 or *3:
- -- - when bit*2: factor is 2, 8 or 32
- -- - when bit*3: factor is 2, 4, 8, 16, 32 or 64
- -- (and bit*3 can be a combination or bit*2 + 1. Ex: bit*2 ADCON0_ADCS,
and bit ADCON1_ADCS2
- -- How ADCS bits are distributed in device files ?
- -- - grep ADCON0_ADCS[[:space:]] * | awk '{print $3}' | sort -u
- -- => gives "bit*2". So if ADCON0_ADCS exists, then it's 2-bits
long
- -- - grep _ADCS[[:digit:]] * | awk '{print $3,$4}' | sort -u
- -- => gives "bit ADCON1_ADCS2". So if ADCON1_ADCS2 exists, then
this is the 3rd bit
- -- - grep _ADCS * | grep bit.2 | awk '{print $4}' | sort -u
- -- => gives "ADCON0_ADCS". So all other are bit*3 ...
- -- - grep _ADCS * | grep bit.3 | awk '{print $4}' | sort -u
- -- => ... and these are: ADCON1_ADCS, ADCON2_ADCS, ANSEL_ADCS
- -- - for p in `grep ADCON1_ADCS2 * | sed "s#:var.*##"`; do grep
_ADCS[[:space:]] $p | awk '{print $3,$4}';done | sort -u
- -- => gives "bit*2 ADCON0_ADCS" so extra 3rd bit exists when
ADCON0_ADCS is defined
- -- Final note before code: when a third extra bit exists, if multiply
by 2 the factor.
- -- This means without this 3rd bit, we have exactly the same
distribution as for PICs with
- -- only 2-bits long ADCS.
-
- -- Normalize ADCS bits
- if defined(ADCON0_ADCS) == true then
- var volatile bit*2 jallib_adcs_lsb is ADCON0_ADCS
- if defined(ADCON1_ADCS2) == true then
- const byte ADC_ADCS_BIT_LONG = 3
- const bit ADC_ADCS_BIT_SPLIT = true
- var volatile bit jallib_adcs_msb is ADCON1_ADCS2
- else
- const byte ADC_ADCS_BIT_LONG = 2
- const bit ADC_ADCS_BIT_SPLIT = false
- var volatile bit jallib_adcs_msb -- float in the air
- end if
- end if
- if defined(ADCON1_ADCS) == true then
- var volatile bit*3 jallib_adcs is ADCON1_ADCS
- const byte ADC_ADCS_BIT_LONG = 3
- const bit ADC_ADCS_BIT_SPLIT = false
- end if
- if defined(ADCON2_ADCS) == true then
- var volatile bit*2 jallib_adcs is ADCON2_ADCS
- const byte ADC_ADCS_BIT_LONG = 3
- const bit ADC_ADCS_BIT_SPLIT = false
- end if
- if defined(ANSEL_ADCS) == true then
- var volatile bit*2 jallib_adcs_lsb is ANSEL_ADCS
- const byte ADC_ADCS_BIT_LONG = 3
- const bit ADC_ADCS_BIT_SPLIT = false
- end if
-
- var volatile bit*3 adcs
- -- This is an horrible implementation...
- if ADC_ADCS_BIT_LONG == 3 then
- -- Compute from 64 to 2
- if adc_eval_tad(64) == true then
- adcs = 0b_110
- elsif adc_eval_tad(32) == true then
- adcs = 0b_010
- elsif adc_eval_tad(16) == true then
- adcs = 0b_101
- elsif adc_eval_tad(8) == true then
- adcs = 0b_001
- elsif adc_eval_tad(4) == true then
- adcs = 0b_100
- elsif adc_eval_tad(2) == true then
- adcs = 0b_000
- end if
- else
- -- Compute from 32 to 2
- if adc_eval_tad(32) == true then
- adcs = 0b_010
- elsif adc_eval_tad(8) == true then
- adcs = 0b_001
- elsif adc_eval_tad(2) == true then
- adcs = 0b_000
- end if
- end if
-
- var bit*2 adcs_lsb at adcs : 0
- var bit adcs_msb at adcs : 2
- if ADC_ADCS_BIT_LONG == 3 then
- if ADC_ADCS_BIT_SPLIT == true then
- jallib_adcs_lsb = adcs_lsb
- jallib_adcs_msb = adcs_msb
- else
- jallib_adcs = adcs
- end if
- else
- jallib_adcs_lsb = adcs_lsb
- end if
-
end procedure
Added: trunk/include/peripheral/adc/adc_clock.jal
==============================================================================
--- (empty file)
+++ trunk/include/peripheral/adc/adc_clock.jal Sun Jun 7 02:08:40 2009
@@ -0,0 +1,158 @@
+-- Title: ADC block configuration
+-- Author: Sebastien Lelong, Copyright (c) 2009, all rights reserved.
+-- Adapted-by: Sebastien Lelong.
+-- Compiler: >=2.4k
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the ZLIB license
(http://www.opensource.org/licenses/zlib-license.html)
+--
+-- Description: this library provides a procedure to configure
+-- ADC clock according to ADC constraints about Tad values and PIC's clock
speed
+--
+
+-- Default min/max Tad value
+-- Expressed as usecs * 10: if you want 1.6usecs, say 16
+-- See adc_init for details
+
+
+if defined(ADC_MIN_TAD) == false then
+ -- So this is 1.6usecs
+ const byte ADC_MIN_TAD = 16
+end if
+if defined(ADC_MAX_TAD) == false then
+ -- And this is 6usecs
+ const byte ADC_MAX_TAD = 60
+end if
+
+
+function _adc_eval_tad(word in factor) return bit is
+ -- Tad value are float (eg. 1.6usecs) but compiler can't handle them
+ -- we'll multiply this by 10 so we have intergers
+
+ -- factor is typically 64 to 1. Why a word ?
+ -- Compiler says about promotion during multiplication:
+ -- "If both operands have the same signedness and width,
+ -- the result is that of the operands."
+ -- So, byte * 10 will give a byte. Ex: 32 * 10 = 64 ...
+ -- That's we use a word, so the result can fit in a word (320)
+
+ var word tad_value = 0
+ var bit tad_ok = false
+ tad_value = (factor * 10) / (target_clock / 1_000_000)
+ test_word(tad_value)
+ if tad_value >= ADC_MIN_TAD & tad_value < ADC_MAX_TAD then
+ tad_ok = true
+ end if
+ return tad_ok
+end function
+
+
+procedure _adc_init_clock() is
+ -- Seb: selecting the appropriate clock bits
+ -- is a real nightmare, yet critical.
+ -- Strictly speaking, all PICs don't have the same
+ -- value in min/max Tad. And some PICs can go higher than
+ -- 20MHz, like 18F. And, LF PICs don't follow the same rules as
+ -- F PICs (see 18F4550 and 18LF4550 for instance)
+ -- How to get a general rule of thumb ?...
+ --
+ -- Well... I got an idea !
+ -- For 16F88, and for many other PICs: 1.6usec < Tad < 6.4usec
+ -- For 18F4550 (and other 18F PICs ?): 0.7usec < Tad < 25usec
+ -- So, honoring 16F88 values should do the trick for 18F4550, right ?
+ -- We then just need to compute Tad from the highest possible clock
value,
+ -- and decreasing until Tad interval is match.
+
+ -- Oh, I forgot ! clock selection bits can *2 or *3:
+ -- - when bit*2: factor is 2, 8 or 32
+ -- - when bit*3: factor is 2, 4, 8, 16, 32 or 64
+ -- (and bit*3 can be a combination or bit*2 + 1. Ex: bit*2 ADCON0_ADCS,
and bit ADCON1_ADCS2
+ -- How ADCS bits are distributed in device files ?
+ -- - grep ADCON0_ADCS[[:space:]] * | awk '{print $3}' | sort -u
+ -- => gives "bit*2". So if ADCON0_ADCS exists, then it's 2-bits
long
+ -- - grep _ADCS[[:digit:]] * | awk '{print $3,$4}' | sort -u
+ -- => gives "bit ADCON1_ADCS2". So if ADCON1_ADCS2 exists, then
this is the 3rd bit
+ -- - grep _ADCS * | grep bit.2 | awk '{print $4}' | sort -u
+ -- => gives "ADCON0_ADCS". So all other are bit*3 ...
+ -- - grep _ADCS * | grep bit.3 | awk '{print $4}' | sort -u
+ -- => ... and these are: ADCON1_ADCS, ADCON2_ADCS, ANSEL_ADCS
+ -- - for p in `grep ADCON1_ADCS2 * | sed "s#:var.*##"`; do grep
_ADCS[[:space:]] $p | awk '{print $3,$4}';done | sort -u
+ -- => gives "bit*2 ADCON0_ADCS" so extra 3rd bit exists when
ADCON0_ADCS is defined
+ -- Final note before code: when a third extra bit exists, if multiply
by 2 the factor.
+ -- This means without this 3rd bit, we have exactly the same
distribution as for PICs with
+ -- only 2-bits long ADCS.
+
+ -- Normalize ADCS bits
+ if defined(ADCON0_ADCS) == true then
+ var volatile bit*2 jallib_adcs_lsb is ADCON0_ADCS
+ if defined(ADCON1_ADCS2) == true then
+ const byte ADC_ADCS_BIT_LONG = 3
+ const bit ADC_ADCS_BIT_SPLIT = true
+ var volatile bit jallib_adcs_msb is ADCON1_ADCS2
+ else
+ const byte ADC_ADCS_BIT_LONG = 2
+ const bit ADC_ADCS_BIT_SPLIT = false
+ var volatile bit jallib_adcs_msb -- float in the air
+ end if
+ end if
+ if defined(ADCON1_ADCS) == true then
+ var volatile bit*3 jallib_adcs is ADCON1_ADCS
+ const byte ADC_ADCS_BIT_LONG = 3
+ const bit ADC_ADCS_BIT_SPLIT = false
+ end if
+ if defined(ADCON2_ADCS) == true then
+ var volatile bit*2 jallib_adcs is ADCON2_ADCS
+ const byte ADC_ADCS_BIT_LONG = 3
+ const bit ADC_ADCS_BIT_SPLIT = false
+ end if
+ if defined(ANSEL_ADCS) == true then
+ var volatile bit*2 jallib_adcs_lsb is ANSEL_ADCS
+ const byte ADC_ADCS_BIT_LONG = 3
+ const bit ADC_ADCS_BIT_SPLIT = false
+ end if
+
+ var volatile bit*3 adcs = 0b_000
+ -- This is an horrible implementation...
+ if ADC_ADCS_BIT_LONG == 3 then
+ -- Compute from 64 to 2
+ if _adc_eval_tad(64) == true then
+ adcs = 0b_110
+ elsif _adc_eval_tad(32) == true then
+ adcs = 0b_010
+ elsif _adc_eval_tad(16) == true then
+ adcs = 0b_101
+ elsif _adc_eval_tad(8) == true then
+ adcs = 0b_001
+ elsif _adc_eval_tad(4) == true then
+ adcs = 0b_100
+ elsif _adc_eval_tad(2) == true then
+ adcs = 0b_000
+ end if
+ else
+ -- Compute from 32 to 2
+ if _adc_eval_tad(32) == true then
+ adcs = 0b_010
+ elsif _adc_eval_tad(8) == true then
+ adcs = 0b_001
+ elsif _adc_eval_tad(2) == true then
+ adcs = 0b_000
+ end if
+ end if
+
+ var bit*2 adcs_lsb at adcs : 0
+ var bit adcs_msb at adcs : 2
+ if ADC_ADCS_BIT_LONG == 3 then
+ if ADC_ADCS_BIT_SPLIT == true then
+ jallib_adcs_lsb = adcs_lsb
+ jallib_adcs_msb = adcs_msb
+ else
+ jallib_adcs = adcs
+ end if
+ else
+ jallib_adcs_lsb = adcs_lsb
+ end if
+
+end procedure
+
+
+
Added: trunk/test/unittest/16f877_adc.jalt
==============================================================================
--- (empty file)
+++ trunk/test/unittest/16f877_adc.jalt Sun Jun 7 02:08:40 2009
@@ -0,0 +1,127 @@
+-- Title: unittest to check ADC libs for 16F88
+-- Author: Sebastien Lelong, Copyright (c) 2008-2009, all rights reserved.
+-- Adapted-by:
+-- Compiler: >=2.4k
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
+--
+-- Description: this describes multiple unittests (a testcase), to test the
+-- many different combination while setting up ADC.
+--
+-- Notes: see jallib wiki page about unit testing to learn how to use this
file
+--
+
+;@jallib section pic_20MHz
+include 16f877
+pragma target OSC HS
+pragma target clock 20_000_000
+pragma target WDT disabled
+pragma target LVP disabled
+enable_digital_io()
+
+;@jallib section pic_4MHz
+include 16f877
+pragma target OSC HS
+pragma target clock 4_000_000
+pragma target WDT disabled
+pragma target LVP disabled
+enable_digital_io()
+
+;@jallib section pic_1MHz
+include 16f877
+pragma target OSC HS
+pragma target clock 1_000_000
+pragma target WDT disabled
+pragma target LVP disabled
+enable_digital_io()
+
+;@jallib section self_test
+include unittest
+var byte a = 120
+test_byte(a) ;@assertEquals 120 test_test
+
+
+;@jallib testcase test_delay_clock_20MHz
+;@jallib use pic_20MHz
+;@jallib use self_test
+const bit ADC_HIGH_RESOLUTION = true
+const byte ADC_NCHANNEL = 1
+const byte ADC_NVREF = 0
+include adc
+adc_init()
+-- Check delay
+test_byte(adc_conversion_delay) ;@assertEquals 21 test_compute_delay
+-- Check clock section bits
+-- XYY
+-- adcs =? 0b_010
+asm nop
+var byte adcon0_temp = ADCON0 & 0b_1100_0000
+test_byte(adcon0_temp) ;@assertEquals 128 test_compute_tad_adcs
+
+
+;@jallib testcase test_delay_clock_4MHz
+;@jallib use pic_4MHz
+;@jallib use self_test
+const bit ADC_HIGH_RESOLUTION = true
+const byte ADC_NCHANNEL = 1
+const byte ADC_NVREF = 0
+include adc
+adc_init()
+-- Check clock section bits
+-- XYY
+-- adcs =? 0b_010
+asm nop
+var byte adcon0_temp = ADCON0 & 0b_1100_0000
+test_byte(adcon0_temp) ;@assertEquals 64 test_compute_tad_adcs
+
+
+;@jallib testcase test_delay_clock_1MHz
+;@jallib use pic_1MHz
+;@jallib use self_test
+const bit ADC_HIGH_RESOLUTION = true
+const byte ADC_NCHANNEL = 1
+const byte ADC_NVREF = 0
+include adc
+adc_init()
+-- Check clock section bits
+-- XYY
+-- adcs =? 0b_010
+asm nop
+var byte adcon0_temp = ADCON0 & 0b_1100_0000
+test_byte(adcon0_temp) ;@assertEquals 0 test_compute_tad_adcs
+
+
+;@jallib testcase test_combination_0vref_1an
+;@jallib use pic_20MHz
+;@jallib use self_test
+const bit ADC_HIGH_RESOLUTION = true
+const byte ADC_NCHANNEL = 5
+const byte ADC_NVREF = 1
+include adc
+adc_init()
+
+
+;@jallib testcase test_right_justification
+;@jallib use pic_20MHz
+;@jallib use self_test
+const bit ADC_HIGH_RESOLUTION = true
+const byte ADC_NCHANNEL = 1
+const byte ADC_NVREF = 0
+include adc
+adc_init()
+var byte adcon1_temp = ADCON1 & 0b_1000_0000
+test_byte(adcon1_temp) ;@assertEquals 128 test_right_justified
+
+
+;@jallib testcase test_left_justification
+;@jallib use pic_20MHz
+;@jallib use self_test
+const bit ADC_HIGH_RESOLUTION = false
+const byte ADC_NCHANNEL = 1
+const byte ADC_NVREF = 0
+include adc
+adc_init()
+var byte adcon1_temp = ADCON1 & 0b_1000_0000
+test_byte(adcon1_temp) ;@assertEquals 0 test_right_justified
+
Modified: trunk/test/unittest/16f88_adc.jalt
==============================================================================
--- trunk/test/unittest/16f88_adc.jalt (original)
+++ trunk/test/unittest/16f88_adc.jalt Sun Jun 7 02:08:40 2009
@@ -9,18 +9,12 @@
-- Description: this describes multiple unittests (a testcase), to test the
-- many different combination while setting up ADC.
--
--- Notes: this is not a standard jal file, it's jal test file. That's why
its
--- extension is ".jalt". jalt files describes sections and testcase, which
are
--- assembled on-the-fly while running tests
--- --
--- To run/compile this file, you need "jallib" wrapper:
--- jallib unittest file.jalt
---
+-- Notes: see jallib wiki page about unit testing to learn how to use this
file
--
+
-- These are the different PIC configuration, with different clock
-- speed. Clock speed can have impacts on acquisition delay computation,
-
;@jallib section pic_20MHz
include 16f88 ;@no_debug
pragma target OSC HS
@@ -35,12 +29,31 @@
pragma target WDT disabled
enable_digital_io()
+;@jallib section pic_8MHz
+include 16f88 ;@no_debug
+pragma target OSC HS
+pragma target clock 8_000_000
+pragma target WDT disabled
+enable_digital_io()
+
+;@jallib section pic_4MHz
+include 16f88 ;@no_debug
+pragma target OSC HS
+pragma target clock 4_000_000
+pragma target WDT disabled
+enable_digital_io()
+
+;@jallib section pic_1MHz
+include 16f88 ;@no_debug
+pragma target OSC HS
+pragma target clock 1_000_000
+pragma target WDT disabled
+enable_digital_io()
+
-- This unittest is a "self test". It should always be run and
-- give a success. It not, current PIC is probably not supported
-- by PICShell.
-
-
;@jallib section self_test
include unittest
var byte a = 120
@@ -63,7 +76,6 @@
asm nop
var byte adcon0_temp = ADCON0 & 0b_1100_0000
test_byte(adcon0_temp) ;@assertEquals 128 test_compute_tad_adcs
-
asm nop
var byte adcon1_temp = ADCON1 & 0b_0100_0000
test_byte(adcon1_temp) ;@assertEquals 64 test_compute_tad_adcs2
@@ -71,7 +83,6 @@
;@jallib testcase test_1vref_max_rsource
-
;@jallib use pic_10MHz
;@jallib use self_test
const byte ADC_NVREF = 1
@@ -83,13 +94,71 @@
test_byte(adc_conversion_delay) ;@assertEquals 21 test_compute_delay
set_analog_pin(0)
-asm nop
-- XYY
-- adcs =? 0b_010
+asm nop
var byte adcon0_temp = ADCON0 & 0b_1100_0000
test_byte(adcon0_temp) ;@assertEquals 128 test_compute_tad_adcs
+asm nop
+var byte adcon1_temp = ADCON1 & 0b_0100_0000
+test_byte(adcon1_temp) ;@assertEquals 0 test_compute_tad_adcs2
+
+
+;@jallib testcase test_0vref_8MHz
+;@jallib use pic_8MHz
+;@jallib use self_test
+const byte ADC_NVREF = 0
+const bit ADC_HIGH_RESOLUTION = true
+const word ADC_RSOURCE = 10_000
+include adc
+adc_init()
+set_analog_pin(0)
+-- XYY
+-- adcs =? 0b_010
+asm nop
+var byte adcon0_temp = ADCON0 & 0b_1100_0000
+test_byte(adcon0_temp) ;@assertEquals 128 test_compute_tad_adcs
asm nop
var byte adcon1_temp = ADCON1 & 0b_0100_0000
test_byte(adcon1_temp) ;@assertEquals 0 test_compute_tad_adcs2
+
+;@jallib testcase test_0vref_4MHz
+;@jallib use pic_4MHz
+;@jallib use self_test
+const byte ADC_NVREF = 0
+const bit ADC_HIGH_RESOLUTION = true
+const word ADC_RSOURCE = 10_000
+include adc
+adc_init()
+set_analog_pin(0)
+
+-- XYY
+-- adcs =? 0b_101
+asm nop
+var byte adcon0_temp = ADCON0 & 0b_1100_0000
+test_byte(adcon0_temp) ;@assertEquals 64 test_compute_tad_adcs
+asm nop
+var byte adcon1_temp = ADCON1 & 0b_0100_0000
+test_byte(adcon1_temp) ;@assertEquals 64 test_compute_tad_adcs2
+
+
+;@jallib testcase test_0vref_1MHz
+;@jallib use pic_1MHz
+;@jallib use self_test
+const byte ADC_NVREF = 0
+const bit ADC_HIGH_RESOLUTION = true
+const word ADC_RSOURCE = 10_000
+include adc
+adc_init()
+set_analog_pin(0)
+
+-- XYY
+-- adcs =? 0b_101
+asm nop
+var byte adcon0_temp = ADCON0 & 0b_1100_0000
+test_byte(adcon0_temp) ;@assertEquals 0 test_compute_tad_adcs
+asm nop
+var byte adcon1_temp = ADCON1 & 0b_0100_0000
+test_byte(adcon1_temp) ;@assertEquals 64 test_compute_tad_adcs2
Modified: trunk/tools/jallib.py
==============================================================================
--- trunk/tools/jallib.py (original)
+++ trunk/tools/jallib.py Sun Jun 7 02:08:40 2009
@@ -862,7 +862,7 @@
return oracle
-def parse_unittest(filename):
+def parse_unittest(filename,run_testcases=[]):
import tempfile
content = file(filename).read().splitlines()
restags = parse_tags(content,"section","testcase")
@@ -874,6 +874,8 @@
# extract each tests, and store them in temporary files
test_filenames = []
for testname,testcontent in restags['testcase'].items():
+ if run_testcases and not testname in run_testcases:
+ continue
wholetest = merge_board_testfile(pseudoboard,testcontent)
fileno,filename =
tempfile.mkstemp(prefix="jallib_",suffix="_%s.jal" %
testname)
fileobj = os.fdopen(fileno,"w")
@@ -884,27 +886,32 @@
return test_filenames
def do_unittest(args):
- # args contain jal files to test
+ # args contain a jal file to test, and optionally a list
+ # testcase's name to run. If it's a "regular jal" file
+ # there's no way to specify which testcase to run, since
+ # only one testcase can be declared.
+ filename = args[0]
+ testcases = args[1:]
+
at_least_one_failed = False
- for filename in args:
- # is it a file "jal test" file, with multiple declared tests in
it ?
- if filename.endswith(".jalt"):
- utests = parse_unittest(filename)
- for t in utests:
- try:
- oracle = unittest(t)
- finally:
- # clean tmp file !
- os.unlink(t)
- print "Test results: %s" % oracle
- if oracle['failure']:
- at_least_one_failed = True
- # or just a regular file
- else:
- oracle = unittest(filename)
- print "Test results: %s" % oracle
+ if filename.endswith(".jalt"):
+ utests = parse_unittest(filename,testcases)
+ for t in utests:
+ try:
+ oracle = unittest(t)
+ finally:
+ # clean tmp file !
+ os.unlink(t)
if oracle['failure']:
at_least_one_failed = True
+ print "Test results: %s" % oracle
+
+ # or just a regular file
+ else:
+ oracle = unittest(filename)
+ if oracle['failure']:
+ at_least_one_failed = True
+ print "Test results: %s" % oracle
if at_least_one_failed:
sys.exit(1)
@@ -1304,7 +1311,7 @@
'jalapi' : {'callback' : do_jalapi, 'options' :
'slt:d:g:o:', 'help' :
jalapi_help},
'sample' : {'callback' : do_sample, 'options' :
'a:b:t:o:', 'help' :
sample_help},
'reindent' : {'callback' :
do_reindent, 'options' : 'c:', 'help' : reindent_help},
- 'unittest' : {'callback' :
do_unittest, 'options' : '', 'help' : unittest_help},
+ 'unittest' : {'callback' :
do_unittest, 'options' : '', 'help' : unittest_help},
'help' : {'callback' : do_help, 'options' : '',
'help' :
None},
'license' : {'callback' :
do_license, 'options' : '', 'help' : None},
}
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