Hi guys,
Kyle reported all jallib samples compile OK, but I found some issues
with samples of the most recent SVN revision:
18f14k50_adc-independent.jal
18f2450_adc_dependent.jal
18f4550_adc.jal
18f4550_adc_dependent.jal
18f4550_dynamic_adc.jal
The first one gives:
generating p-code
1105 tokens, 273589 chars; 6943 lines; 12 files
generating PIC code pass 1
generating PIC code pass 2
writing result
./lib/adc_channels.jal:3471: warning: "
Unable to find how Vref is setup with this chip, selection Vref won't work
Please report !"
./lib/adc_clock.jal:106: warning: "Oscillator frequency too high for Tad, using
internal clock"
Code area: 1794 of 16384 used (bytes)
Data area: 86 of 672 used
Software stack available: 586 bytes
Hardware stack depth 3 of 31
0 errors, 2 warnings
The others have only the OSC freq warning.
Is this 'on purpose'?? And if so, didn't we agree to provide only
samples without errors or warnings?
BTW I would prefer to have the last of these samples be renamed to
18f4550_adc_dynamic.jal, like the other 'adc' samples.
Regards, Rob.
--
R. Hamerling, Netherlands --- http://www.robh.nl
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