Hi Rob, 2011/2/1 Rob Hamerling <[email protected]>
> > Hi guys, > > Kyle reported all jallib samples compile OK, but I found some issues with > samples of the most recent SVN revision: > > 18f14k50_adc-independent.jal > 18f2450_adc_dependent.jal > 18f4550_adc.jal > 18f4550_adc_dependent.jal > 18f4550_dynamic_adc.jal > [...] > >> ./lib/adc_channels.jal:3471: warning: " >> Unable to find how Vref is setup with this chip, selection Vref won't >> work >> Please report !" >> > pretty weird, I need to dig this, but if previous compiler doesn't show this warning, there's something wrong. > ./lib/adc_clock.jal:106: warning: "Oscillator frequency too high for Tad, >> using internal clock" >> > I've already seen this warning using previous 2.4o-beta. I'm not just to understand the meaning of this message. Does it mean "freq is too high, you can't use internal clock" or "freq is too high, you should use internal clock" ? > BTW I would prefer to have the last of these samples be renamed to > 18f4550_adc_dynamic.jal, like the other 'adc' samples. > Sure, it makes sense. I'll take care of it while looking at first issue. Can you give some more information regarding OSC warning (IIRC this is something added while improving adc_clock.jal ?) Cheers Seb -- You received this message because you are subscribed to the Google Groups "jallib" group. To post to this group, send email to [email protected]. To unsubscribe from this group, send email to [email protected]. For more options, visit this group at http://groups.google.com/group/jallib?hl=en.
