Hi, On Fri, Jul 19, 2019 at 07:56:47PM +0000, Eric Van Tol wrote: > On 7/19/19, 3:40 PM, "Gert Doering" <g...@greenie.muc.de> wrote: > That sounds a bit weird... why should the device care how the other > end balances its packets? Never heard anyone state this, and I can't > come up with a reason why. > > *sigh* > > I'd been focusing way too much on the config portion of the documentation > that I completely skimmed over the very first paragraph: > > "MX Series routers with Aggregated Ethernet PICs support symmetrical > load balancing on an 802.3ad LAG. This feature is significant when > two MX Series routers are connected transparently through deep > packet inspection (DPI) devices over an LAG bundle.
Yes, *that* makes total sense :-) (I was thinking about "is it something with stateful inspection?" but since this - inside MX or Cisco - usually operates "on the ae/port-channel level" and not the individual member, it didn't make sense either) gert -- "If was one thing all people took for granted, was conviction that if you feed honest figures into a computer, honest figures come out. Never doubted it myself till I met a computer with a sense of humor." Robert A. Heinlein, The Moon is a Harsh Mistress Gert Doering - Munich, Germany g...@greenie.muc.de
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