* Avi Kivity <[EMAIL PROTECTED]> wrote:
> >yeah. Would be nice to see some hard numbers about how many cycles all
> >these context load/save variants take.
>
> PIO latency on AMD (including a trip to qemu and back) is 5500 cycles
> [1]. Intel is significantly higher.
>
> [1] http://virt.kernelnewbies.org/KVM/Performance
ok. We need the IPI only on VMX, right? That's because it has cached VM
state in the CPU that needs to be flushed out to the public VM area
before it can be loaded into another CPU, correct? Is there no cheap way
to do this flushing preemptively (say in vcpu_put()), to make the VM
context potentially loadable into another CPU?
Ingo
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