Nitin A Kamble wrote:
> Hi Avi,
>   This patch corrects the emulation of the instruction "or" for opcodes
> 0xc & 0cd.
>   Please Apply.
>   

> +     case 0x0c:              /* or al imm8 */
> +             dst.type = OP_REG;
> +             dst.ptr = &_regs[VCPU_REGS_RAX];
> +             dst.val = *(u8 *)dst.ptr;
> +             dst.bytes = 1;
> +             dst.orig_val = dst.val;
> +             goto or;
> +     case 0x0d:              /* or ax imm16, or eax imm32 */
> +             dst.type = OP_REG;
> +             dst.bytes = op_bytes;
> +             dst.ptr = &_regs[VCPU_REGS_RAX];
> +             if (op_bytes == 2)
> +                     dst.val = *(u16 *)dst.ptr;
> +             else
> +                     dst.val = *(u32 *)dst.ptr;
> +             dst.orig_val = dst.val;
> +             goto or;

Instead of repeating this code for all instructions that use the
accumulator implicitly, we should define a bit in the decoder flags
(like DstAcc) so that all the code is consolidated in the decoder.  This
applies to 'sub imm' and 'cmp correction', and probably others as well.

-- 
Do not meddle in the internals of kernels, for they are subtle and quick to 
panic.


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