Nitin A Kamble wrote: > Hi Avi, > Attached is the patch to implement instruction: > mov rl/rh/r, imm > opcodes: 0xb0 - 0xbf > > case 0xb0 ... 0xb3: /* mov rl, imm8 */ > + dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX + (b & 0x3)]; > + dst.val = src.val; > + dst.type = OP_REG; > + dst.bytes = 1; > + break; > + case 0xb4 ... 0xb7: /* mov rh, imm8 */ > + dst.ptr = ((void *)&_regs[VCPU_REGS_RAX + (b & 0x3)] + 1); > + dst.val = src.val; > + dst.type = OP_REG; > + dst.bytes = 1; > + break; > + case 0xb8 ... 0xbf: /* mov r, imm */ > + dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX + (b & 0x7)]; > + dst.val = src.val; > + dst.type = OP_REG; > + break;
Can't the decoder select the dst reg? Looks like duplicate work here. -- Do not meddle in the internals of kernels, for they are subtle and quick to panic. ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/ _______________________________________________ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
