Avi Kivity wrote:
>>
>> I think we need to go back to active low pci irqs, and to have 
>> no-ioapic working we need to insert an inverter between the pci irq 
>> links and the pic.  I base this on the following:
>>
>> - piix doesn't contain an ioapic, so the actual lines must be active low
>> - the piix pic elcr is documented as active-high for level-triggered 
>> irqs
>>
>
> Okay, this is likely right as I was able to shutdown both Windows and 
> Linux with the following:
>

No, it's wrong.

I found a piix4 acpi spec update that says that the SCI interrupt is 
hardwired to IRQ9 and is active high.  Linux knows about this and 
ignores the pci irq config for this function.  With the following changes

- change acpi sci interrupt to be hardwired to irq9
- remove irq 9 from acpi dsdt (since qemu can't mix isa irqs and pci 
irqs correctly)
- change the madt interrupt source override structure size to 10 (it was 
12, which caused Windows to ignore it)
- advertise the sci interrupt as tied to irq 9 in the fadt (instead of 
consulting the false pci config)

both Windows and Linux are happy.  I was even able to drop the forced 
pci irq enabling hack.

I'll push those changes tomorrow morning.  They are especially important 
with the acpi-based cpu and device hotplug that is brewing.

-- 
Any sufficiently difficult bug is indistinguishable from a feature.


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