Hi Alex/Scott,
Below is my understanding about the ONE_REG interface requirement for timer
registers.
Define the below 2 ONE_REG interface for TSR access:
KVM_REG_SET_TSR, // Set the specified bits in TSR
KVM_REG_CLEAR_TSR, // Clear the specified bits in TSR
QEMU will use the above ioctl call to selectively set/clear bits of TSR.
We do not need the similar interface for TCR as there is no race issue with
TCR. So for TCR QEMU will keep on using the SREGS interface.
Thanks
-Bharat
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