On 04.02.2013, at 07:12, Bhushan Bharat-R65777 wrote:

> Hi Alex/Scott,
> 
> Below is my understanding about the ONE_REG interface requirement for timer 
> registers.
> 
> Define the below 2 ONE_REG interface for TSR access:
>       KVM_REG_SET_TSR,  // Set the specified bits in TSR

s/SET/OR/

>       KVM_REG_CLEAR_TSR, // Clear the specified bits in TSR
> 
> QEMU will use the above ioctl call to selectively set/clear bits of TSR.

Exactly :).

> We do not need the similar interface for TCR as there is no race issue with 
> TCR. So for TCR QEMU will keep on using the SREGS interface.

Good point, yes :).


Alex

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