Feature fractional field of an ID register cannot be simply validated
at KVM_SET_ONE_REG because its validity depends on its (main) feature
field value, which could be in a different ID register (and might be
set later).
Validate fractional fields at the first KVM_RUN instead.

Signed-off-by: Reiji Watanabe <rei...@google.com>
---
 arch/arm64/kvm/sys_regs.c | 98 +++++++++++++++++++++++++++++++++++++--
 1 file changed, 94 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 2c092136cdff..536e313992d4 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -632,9 +632,6 @@ static struct id_reg_info id_aa64pfr0_el1_info = {
 
 static struct id_reg_info id_aa64pfr1_el1_info = {
        .sys_reg = SYS_ID_AA64PFR1_EL1,
-       .ignore_mask = ARM64_FEATURE_MASK(ID_AA64PFR1_RASFRAC) |
-                      ARM64_FEATURE_MASK(ID_AA64PFR1_MPAMFRAC) |
-                      ARM64_FEATURE_MASK(ID_AA64PFR1_CSV2FRAC),
        .init = init_id_aa64pfr1_el1_info,
        .validate = validate_id_aa64pfr1_el1,
        .get_reset_val = get_reset_id_aa64pfr1_el1,
@@ -3198,10 +3195,79 @@ int kvm_arm_copy_sys_reg_indices(struct kvm_vcpu *vcpu, 
u64 __user *uindices)
        return write_demux_regids(uindices);
 }
 
+/* ID register's fractional field information with its feature field. */
+struct feature_frac {
+       u32     frac_id;
+       u32     id;
+       u64     frac_mask;
+       u64     mask;
+};
+
+static const struct feature_frac feature_frac_table[] = {
+       {
+               .frac_id = SYS_ID_AA64PFR1_EL1,
+               .frac_mask = ARM64_FEATURE_MASK(ID_AA64PFR1_RASFRAC),
+               .id = SYS_ID_AA64PFR0_EL1,
+               .mask = ARM64_FEATURE_MASK(ID_AA64PFR0_RAS),
+       },
+       {
+               .frac_id = SYS_ID_AA64PFR1_EL1,
+               .frac_mask = ARM64_FEATURE_MASK(ID_AA64PFR1_MPAMFRAC),
+               .id = SYS_ID_AA64PFR0_EL1,
+               .mask = ARM64_FEATURE_MASK(ID_AA64PFR0_MPAM),
+       },
+       {
+               .frac_id = SYS_ID_AA64PFR1_EL1,
+               .frac_mask = ARM64_FEATURE_MASK(ID_AA64PFR1_CSV2FRAC),
+               .id = SYS_ID_AA64PFR0_EL1,
+               .mask = ARM64_FEATURE_MASK(ID_AA64PFR0_CSV2),
+       },
+};
+
+/*
+ * Return non-zero if the feature/fractional fields pair are not
+ * supported. Return zero otherwise.
+ */
+static int vcpu_id_reg_feature_frac_check(const struct kvm_vcpu *vcpu,
+                                         const struct feature_frac *ftr_frac)
+{
+       const struct id_reg_info *id_reg;
+       u32 id;
+       u64 val, lim;
+       int err;
+
+       /* Check the feature field */
+       id = ftr_frac->id;
+       val = __vcpu_sys_reg(vcpu, IDREG_SYS_IDX(id)) & ftr_frac->mask;
+       id_reg = GET_ID_REG_INFO(id);
+       lim = id_reg ? id_reg->vcpu_limit_val : read_sanitised_ftr_reg(id);
+       lim &= ftr_frac->mask;
+       err = arm64_check_features(id, val, lim);
+       if (err)
+               /* The feature version is larger than the limit. */
+               return err;
+
+       if (val != lim)
+               /*
+                * The feature version is smaller than the limit.
+                * Any fractional version should be fine.
+                */
+               return 0;
+
+       /* Check the fractional field */
+       id = ftr_frac->frac_id;
+       val = __vcpu_sys_reg(vcpu, IDREG_SYS_IDX(id)) & ftr_frac->frac_mask;
+       id_reg = GET_ID_REG_INFO(id);
+       lim = id_reg ? id_reg->vcpu_limit_val : read_sanitised_ftr_reg(id);
+       lim &= ftr_frac->frac_mask;
+       return arm64_check_features(id, val, lim);
+}
+
 int kvm_id_regs_consistency_check(const struct kvm_vcpu *vcpu)
 {
-       int i;
+       int i, err;
        const struct kvm_vcpu *t_vcpu;
+       const struct feature_frac *frac;
 
        /*
         * Make sure vcpu->arch.has_run_once is visible for others so that
@@ -3222,6 +3288,17 @@ int kvm_id_regs_consistency_check(const struct kvm_vcpu 
*vcpu)
                                        KVM_ARM_ID_REG_MAX_NUM))
                        return -EINVAL;
        }
+
+       /*
+        * Check ID registers' fractional fields, which aren't checked
+        * when userspace sets.
+        */
+       for (i = 0; i < ARRAY_SIZE(feature_frac_table); i++) {
+               frac = &feature_frac_table[i];
+               err = vcpu_id_reg_feature_frac_check(vcpu, frac);
+               if (err)
+                       return err;
+       }
        return 0;
 }
 
@@ -3240,6 +3317,19 @@ static void id_reg_info_init_all(void)
                else
                        id_reg_info_init(id_reg);
        }
+
+       /*
+        * Update ignore_mask of ID registers based on fractional fields
+        * information.  Any ID register that have fractional fields
+        * is expected to have its own id_reg_info.
+        */
+       for (i = 0; i < ARRAY_SIZE(feature_frac_table); i++) {
+               id_reg = GET_ID_REG_INFO(feature_frac_table[i].frac_id);
+               if (WARN_ON_ONCE(!id_reg))
+                       continue;
+
+               id_reg->ignore_mask |= feature_frac_table[i].frac_mask;
+       }
 }
 
 void kvm_sys_reg_table_init(void)
-- 
2.33.0.882.g93a45727a2-goog

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