On 5/9/07, Bart Smaalders <bart.smaalders at sun.com> wrote: > > Thomas De Schampheleire wrote: > > I will be implementing a power management strategy which will shutdown > > cpu's, so therefore in my situation it will have something to do with > > power management. > > > > What do you exactly mean with "halt"? I suppose you are talking about > > gating the clock, right? > > > > Note that this routine gets called in the idle loop: > > > http://cvs.opensolaris.org/source/xref/onnv/onnv-gate/usr/src/uts/i86pc/os/mp_machdep.c#255
Hi, I'm using SPARC, but nevertheless it is interesting to see that halting is already done in x86. I do not immediately find a reference to what halting exactly is, but I do suppose it means clock gating. That is what I generally understand under halting, and is indeed acceptable to do from an idle loop because the penalty to get out of the halt is quite small. I would like to go a step further and put the cpu in lower power states and eventually shut it down. Do you know whether a similar thing is already done or supported in the x86 code? Thanks, Thomas - Bart > > > -- > Bart Smaalders Solaris Kernel Performance > barts at cyber.eng.sun.com http://blogs.sun.com/barts > -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://mail.opensolaris.org/pipermail/laptop-discuss/attachments/20070509/d44381dc/attachment.html>
