For that type of pulsing application a sigma-delta ADC will not work, you need a "sampling rate" type converter.
If you say that 12 bit would be sufficient, again if you then use a good 16 bit ADC with, say, 0.5 lsb DNL, you can accumulate your data into a "12 bit" histogram (4096 bins) and achieve a 0.5/16 = 0.03125 lsb DNL (in a 12 bit world). Even accumulating in a 14 bit histogram your DNL would still be better than 0.5/4 = 0.125 lsb. You mention that you are testing your DNL using a triangular waveform. Are you sure the non-linearities you are measuring are not created by the generator? Are you accumulating your histogram long enough to randomize the number of events falling in each bin? What ADC or PCI board are you using today and how do you generate your triangular test signal?
