On Wed, 2014-05-14 at 01:47 -0600, Gwenole Beauchesne wrote:
> The MI_FLUSH_DW command contains 5 dwords on Broadwell, i.e. one extra
> dword for the high order bits of the Address field.
Thanks for your patch.
What is wrong if this is applied?
The 4 dwords are still ok to Broadwell. And the address/data field are
not used in the command of MI_FLUSH_DW.
So the current command is correct for Broadwell.
>
> Signed-off-by: Gwenole Beauchesne <gwenole.beauche...@intel.com>
> ---
> src/intel_batchbuffer.c | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/src/intel_batchbuffer.c b/src/intel_batchbuffer.c
> index bc564d5..01e04d5 100644
> --- a/src/intel_batchbuffer.c
> +++ b/src/intel_batchbuffer.c
> @@ -247,13 +247,16 @@ intel_batchbuffer_emit_mi_flush(struct
> intel_batchbuffer *batch)
> }
>
> } else {
> + const uint32_t extra_dword = !!IS_GEN8(intel->device_id);
> uint32_t cmd = MI_FLUSH_DW;
> if (batch->flag == I915_EXEC_BSD)
> cmd |= MI_FLUSH_DW_VIDEO_PIPELINE_CACHE_INVALIDATE;
>
> - __BEGIN_BATCH(batch, 4, batch->flag);
> - __OUT_BATCH(batch, cmd);
> + __BEGIN_BATCH(batch, 4|extra_dword, batch->flag);
> + __OUT_BATCH(batch, cmd|extra_dword);
> __OUT_BATCH(batch, 0);
> + if (extra_dword)
> + __OUT_BATCH(batch, 0);
> __OUT_BATCH(batch, 0);
> __OUT_BATCH(batch, 0);
> __ADVANCE_BATCH(batch);
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