> I once heard a story that cmos machines are always > in lpar mode, even if one specifies lpar=no on the
I believe that VM in basic mode still is different from VM in an LPAR w.r.t. assists etc. This is where V=F lives. But it may be that with modern machines z/OS does not lose anything when moved from basic mode to an LPAR. > I guess the level of sie would also impact on the > efficiency of the tlb etc. I remember looking at aix/esa > using vector processors under VM v=f vs v=v, which made > a hughe difference in performance. With the fixed limit on the number of LPARs, it should be possible to design the CPU such that some look aside buffers are duplicated 15 times to give each LPAR its own things Because virtual machines are far more flexible than LPARs the number of SIE intercepts will be higher. I would expect the code path in CP to handle the intercept to be more expensive than the pure fact that you lost your cache and/or tlb's. Rob