Now remember, I'm still new to VM and barely know what a shared segment is, so I'm just guessing, but...
It probably has to do with the ZIPL boot code not being executed when you IPL the NSS. The boot code stores the PARMs into lowcore at 0x180 for 64 bytes. I recall seeing some NSS specific code in the kernel. I'll see if'n I can get devine the problem. Leland -----Original Message----- From: Adam Thornton To: [EMAIL PROTECTED] Sent: 3/4/03 8:45 PM Subject: Re: Kernel patch to add VM IPL PARM support This may be a silly question based on my deeply imperfect understanding of the VM IPL process, but... Why does the PARM patch not work with a kernel in an NSS? That is, if I define the kernel in an NSS (let's call it DEB24M), and then I do an IPL DEB24M PARM mem=32M I don't actually get the mem=32M appended to my parmline. Works fine when I IPL from DASD, though. Adam
