Re: MMU bug in Dec/Intel ARMs?

[Nicholas Clark]

In the last mail Winnie Wong said:

> Is ldmib the only instruction which causes the problem?
> 
> > -----Original Message-----
> > From:       Russell King - ARM Linux Admin [SMTP:[EMAIL PROTECTED]]

> > The instruction just doesn't get produced by the compiler as far as I
> > know, but I'm not going to rule it out.  However, it doesn't preclude
> > a user program from using the instruction.

So the optimiser will never coalesce

LDR     R0, [R2,#4]
LDR     R1, [R2,#8]

into

LDMIB   R2, {R0,R1}

?

Nick
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