>However, you wouldn't want to cache the setting, since the base register is
>free to be changed by any PNP BIOS or OS at any time. Only the host knows
>what the current state of the PCI bus mapping is.
I don't have the PCI specification here to check, but while that may be true
in some theoretical sense, in practice all reasonable implementations keep
BAR and irq line values cached rather than going to config space every time.
If the mapping for a device is changed it is reasonable to have to restart
that device.
>are going to use it when in add-in mode. In order not to upset the host
>configuration, everything to do with the handling of the PCI bus should be
>done correctly, and definitely not how your patch does it.
I have never claimed that the patch you are thinking about does everything you
need for a plug-in card implementation; it is necessary, but not sufficient.
Last time the issue was raised you refused to even discuss it so I put that
on the back burner.
>I think before even looking into/touching this area/allowing patches to
>touch this area, I want to see the generic PCI code stabilise. Martin Mares
>has some patches outstanding for it.
Well, let us know when it has stabilised to your satisfaction.
p.
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