From: Claudiu Beznea <[email protected]> The Renesas RZ/G3S SoC USB PHY HW block receives as input the USB PWRRDY signal from the system controller. Add support for the Renesas RZ/G3S SoC.
Signed-off-by: Claudiu Beznea <[email protected]> --- Changes in v3: - none; this patch is new drivers/reset/reset-rzg2l-usbphy-ctrl.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/reset/reset-rzg2l-usbphy-ctrl.c b/drivers/reset/reset-rzg2l-usbphy-ctrl.c index 016aae883b2e..98d6323e9f56 100644 --- a/drivers/reset/reset-rzg2l-usbphy-ctrl.c +++ b/drivers/reset/reset-rzg2l-usbphy-ctrl.c @@ -97,6 +97,10 @@ static int rzg2l_usbphy_ctrl_status(struct reset_controller_dev *rcdev, static const struct of_device_id rzg2l_usbphy_ctrl_match_table[] = { { .compatible = "renesas,rzg2l-usbphy-ctrl" }, + { + .compatible = "renesas,r9a08g045-usbphy-ctrl", + .data = (void *)RZG2L_USBPHY_CTRL_PWRRDY + }, { /* Sentinel */ } }; MODULE_DEVICE_TABLE(of, rzg2l_usbphy_ctrl_match_table); -- 2.43.0
