Some helper functions do not use any information from dw_edma_chunk, so
passing a dw_edma_chan pointer directly avoids an unnecessary level of
pointer dereferencing and simplifies data access.

Signed-off-by: Frank Li <[email protected]>
---
 drivers/dma/dw-edma/dw-edma-v0-core.c | 22 ++++++++++------------
 drivers/dma/dw-edma/dw-hdma-v0-core.c | 23 +++++++++++------------
 2 files changed, 21 insertions(+), 24 deletions(-)

diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c 
b/drivers/dma/dw-edma/dw-edma-v0-core.c
index 
a1656b3c6cf9e389b6349dd13f9a4ac3d71b4689..79265684613df4f4a30d6108d696b95a2934dffe
 100644
--- a/drivers/dma/dw-edma/dw-edma-v0-core.c
+++ b/drivers/dma/dw-edma/dw-edma-v0-core.c
@@ -276,13 +276,12 @@ dw_edma_v0_core_handle_int(struct dw_edma_irq *dw_irq, 
enum dw_edma_dir dir,
        return ret;
 }
 
-static void dw_edma_v0_write_ll_data(struct dw_edma_chunk *chunk, int i,
+static void dw_edma_v0_write_ll_data(struct dw_edma_chan *chan, int i,
                                     u32 control, u32 size, u64 sar, u64 dar)
 {
        ptrdiff_t ofs = i * sizeof(struct dw_edma_v0_lli);
-       struct dw_edma_chan *chan = chunk->chan;
 
-       if (chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) {
+       if (chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) {
                struct dw_edma_v0_lli *lli = chan->ll_region.vaddr.mem + ofs;
 
                lli->transfer_size = size;
@@ -300,13 +299,12 @@ static void dw_edma_v0_write_ll_data(struct dw_edma_chunk 
*chunk, int i,
        }
 }
 
-static void dw_edma_v0_write_ll_link(struct dw_edma_chunk *chunk,
+static void dw_edma_v0_write_ll_link(struct dw_edma_chan *chan,
                                     int i, u32 control, u64 pointer)
 {
        ptrdiff_t ofs = i * sizeof(struct dw_edma_v0_lli);
-       struct dw_edma_chan *chan = chunk->chan;
 
-       if (chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) {
+       if (chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) {
                struct dw_edma_v0_llp *llp = chan->ll_region.vaddr.mem + ofs;
 
                llp->llp.reg = pointer;
@@ -339,7 +337,7 @@ static void dw_edma_v0_core_write_chunk(struct 
dw_edma_chunk *chunk)
                                control |= DW_EDMA_V0_RIE;
                }
 
-               dw_edma_v0_write_ll_data(chunk, i++, control, child->sz,
+               dw_edma_v0_write_ll_data(chan, i++, control, child->sz,
                                         child->sar, child->dar);
        }
 
@@ -347,10 +345,10 @@ static void dw_edma_v0_core_write_chunk(struct 
dw_edma_chunk *chunk)
        if (!chunk->cb)
                control |= DW_EDMA_V0_CB;
 
-       dw_edma_v0_write_ll_link(chunk, i, control, chan->ll_region.paddr);
+       dw_edma_v0_write_ll_link(chan, i, control, chan->ll_region.paddr);
 }
 
-static void dw_edma_v0_sync_ll_data(struct dw_edma_chunk *chunk)
+static void dw_edma_v0_sync_ll_data(struct dw_edma_chan *chan)
 {
        /*
         * In case of remote eDMA engine setup, the DW PCIe RP/EP internal
@@ -360,8 +358,8 @@ static void dw_edma_v0_sync_ll_data(struct dw_edma_chunk 
*chunk)
         * LL memory in a hope that the MRd TLP will return only after the
         * last MWr TLP is completed
         */
-       if (!(chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL))
-               readl(chunk->chan->ll_region.vaddr.io);
+       if (!(chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL))
+               readl(chan->ll_region.vaddr.io);
 }
 
 static void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first)
@@ -437,7 +435,7 @@ static void dw_edma_v0_core_start(struct dw_edma_chunk 
*chunk, bool first)
                          upper_32_bits(chan->ll_region.paddr));
        }
 
-       dw_edma_v0_sync_ll_data(chunk);
+       dw_edma_v0_sync_ll_data(chan);
 
        /* Doorbell */
        SET_RW_32(dw, chan->dir, doorbell,
diff --git a/drivers/dma/dw-edma/dw-hdma-v0-core.c 
b/drivers/dma/dw-edma/dw-hdma-v0-core.c
index 
c12cc80c6c99697b50cf65a9720dab5a379dbe54..27f79d9b97d91fdbafc4f1e1e4d099bbbddf60e2
 100644
--- a/drivers/dma/dw-edma/dw-hdma-v0-core.c
+++ b/drivers/dma/dw-edma/dw-hdma-v0-core.c
@@ -152,13 +152,12 @@ dw_hdma_v0_core_handle_int(struct dw_edma_irq *dw_irq, 
enum dw_edma_dir dir,
        return ret;
 }
 
-static void dw_hdma_v0_write_ll_data(struct dw_edma_chunk *chunk, int i,
+static void dw_hdma_v0_write_ll_data(struct dw_edma_chan *chan, int i,
                                     u32 control, u32 size, u64 sar, u64 dar)
 {
        ptrdiff_t ofs = i * sizeof(struct dw_hdma_v0_lli);
-       struct dw_edma_chan *chan = chunk->chan;
 
-       if (chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) {
+       if (chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) {
                struct dw_hdma_v0_lli *lli = chan->ll_region.vaddr.mem + ofs;
 
                lli->transfer_size = size;
@@ -176,13 +175,12 @@ static void dw_hdma_v0_write_ll_data(struct dw_edma_chunk 
*chunk, int i,
        }
 }
 
-static void dw_hdma_v0_write_ll_link(struct dw_edma_chunk *chunk,
+static void dw_hdma_v0_write_ll_link(struct dw_edma_chan *chan,
                                     int i, u32 control, u64 pointer)
 {
        ptrdiff_t ofs = i * sizeof(struct dw_hdma_v0_lli);
-       struct dw_edma_chan *chan = chunk->chan;
 
-       if (chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) {
+       if (chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) {
                struct dw_hdma_v0_llp *llp = chan->ll_region.vaddr.mem + ofs;
 
                llp->llp.reg = pointer;
@@ -198,6 +196,7 @@ static void dw_hdma_v0_write_ll_link(struct dw_edma_chunk 
*chunk,
 
 static void dw_hdma_v0_core_write_chunk(struct dw_edma_chunk *chunk)
 {
+       struct dw_edma_chan *chan = chunk->chan;
        struct dw_edma_burst *child;
        u32 control = 0, i = 0;
 
@@ -205,17 +204,17 @@ static void dw_hdma_v0_core_write_chunk(struct 
dw_edma_chunk *chunk)
                control = DW_HDMA_V0_CB;
 
        list_for_each_entry(child, &chunk->burst->list, list)
-               dw_hdma_v0_write_ll_data(chunk, i++, control, child->sz,
+               dw_hdma_v0_write_ll_data(chan, i++, control, child->sz,
                                         child->sar, child->dar);
 
        control = DW_HDMA_V0_LLP | DW_HDMA_V0_TCB;
        if (!chunk->cb)
                control |= DW_HDMA_V0_CB;
 
-       dw_hdma_v0_write_ll_link(chunk, i, control, 
chunk->chan->ll_region.paddr);
+       dw_hdma_v0_write_ll_link(chan, i, control, 
chunk->chan->ll_region.paddr);
 }
 
-static void dw_hdma_v0_sync_ll_data(struct dw_edma_chunk *chunk)
+static void dw_hdma_v0_sync_ll_data(struct dw_edma_chan *chan)
 {
        /*
         * In case of remote HDMA engine setup, the DW PCIe RP/EP internal
@@ -225,8 +224,8 @@ static void dw_hdma_v0_sync_ll_data(struct dw_edma_chunk 
*chunk)
         * LL memory in a hope that the MRd TLP will return only after the
         * last MWr TLP is completed
         */
-       if (!(chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL))
-               readl(chunk->chan->ll_region.vaddr.io);
+       if (!(chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL))
+               readl(chan->ll_region.vaddr.io);
 }
 
 static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first)
@@ -261,7 +260,7 @@ static void dw_hdma_v0_core_start(struct dw_edma_chunk 
*chunk, bool first)
        SET_CH_32(dw, chan->dir, chan->id, cycle_sync,
                  HDMA_V0_CONSUMER_CYCLE_STAT | HDMA_V0_CONSUMER_CYCLE_BIT);
 
-       dw_hdma_v0_sync_ll_data(chunk);
+       dw_hdma_v0_sync_ll_data(chan);
 
        /* Doorbell */
        SET_CH_32(dw, chan->dir, chan->id, doorbell, HDMA_V0_DOORBELL_START);

-- 
2.34.1


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