ll_region is identical for all chunks belonging to the same DMA channel, so there is no need to copy it into each chunk. Move ll_region to struct dw_edma_chan to avoid redundant copies.
Signed-off-by: Frank Li <[email protected]> --- drivers/dma/dw-edma/dw-edma-core.c | 14 ++++---------- drivers/dma/dw-edma/dw-edma-core.h | 2 +- drivers/dma/dw-edma/dw-edma-v0-core.c | 18 ++++++++++-------- drivers/dma/dw-edma/dw-hdma-v0-core.c | 18 ++++++++++-------- 4 files changed, 25 insertions(+), 27 deletions(-) diff --git a/drivers/dma/dw-edma/dw-edma-core.c b/drivers/dma/dw-edma/dw-edma-core.c index b154bdd7f2897d9a28df698a425afc1b1c93698b..5b12af20cb37156a8dec440401d956652b890d53 100644 --- a/drivers/dma/dw-edma/dw-edma-core.c +++ b/drivers/dma/dw-edma/dw-edma-core.c @@ -64,7 +64,6 @@ static struct dw_edma_burst *dw_edma_alloc_burst(struct dw_edma_chunk *chunk) static struct dw_edma_chunk *dw_edma_alloc_chunk(struct dw_edma_desc *desc) { - struct dw_edma_chip *chip = desc->chan->dw->chip; struct dw_edma_chan *chan = desc->chan; struct dw_edma_chunk *chunk; @@ -81,13 +80,6 @@ static struct dw_edma_chunk *dw_edma_alloc_chunk(struct dw_edma_desc *desc) * - Even chunks originate CB equal to 1 */ chunk->cb = !(desc->chunks_alloc % 2); - if (chan->dir == EDMA_DIR_WRITE) { - chunk->ll_region.paddr = chip->ll_region_wr[chan->id].paddr; - chunk->ll_region.vaddr = chip->ll_region_wr[chan->id].vaddr; - } else { - chunk->ll_region.paddr = chip->ll_region_rd[chan->id].paddr; - chunk->ll_region.vaddr = chip->ll_region_rd[chan->id].vaddr; - } if (desc->chunk) { /* Create and add new element into the linked list */ @@ -767,9 +759,11 @@ static int dw_edma_channel_setup(struct dw_edma *dw, u32 wr_alloc, u32 rd_alloc) chan->status = EDMA_ST_IDLE; if (chan->dir == EDMA_DIR_WRITE) - chan->ll_max = (chip->ll_region_wr[chan->id].sz / EDMA_LL_SZ); + chan->ll_region = chip->ll_region_wr[chan->id]; else - chan->ll_max = (chip->ll_region_rd[chan->id].sz / EDMA_LL_SZ); + chan->ll_region = chip->ll_region_rd[chan->id]; + + chan->ll_max = chan->ll_region.sz / EDMA_LL_SZ; dev_vdbg(dev, "L. List:\tChannel %s[%u] max_cnt=%u\n", str_write_read(chan->dir == EDMA_DIR_WRITE), diff --git a/drivers/dma/dw-edma/dw-edma-core.h b/drivers/dma/dw-edma/dw-edma-core.h index 722f3e0011208f503f426b65645ef26fbae3804b..e074a6375f8a6853c212e65d2d54cb3e614b1483 100644 --- a/drivers/dma/dw-edma/dw-edma-core.h +++ b/drivers/dma/dw-edma/dw-edma-core.h @@ -58,7 +58,6 @@ struct dw_edma_chunk { u8 cb; u32 xfer_sz; - struct dw_edma_region ll_region; /* Linked list */ }; struct dw_edma_desc { @@ -79,6 +78,7 @@ struct dw_edma_chan { enum dw_edma_dir dir; u32 ll_max; + struct dw_edma_region ll_region; /* Linked list */ struct msi_msg msi; diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c b/drivers/dma/dw-edma/dw-edma-v0-core.c index 1b0add95ed655d8d16d381c8294acb252b7bcd2d..a1656b3c6cf9e389b6349dd13f9a4ac3d71b4689 100644 --- a/drivers/dma/dw-edma/dw-edma-v0-core.c +++ b/drivers/dma/dw-edma/dw-edma-v0-core.c @@ -280,9 +280,10 @@ static void dw_edma_v0_write_ll_data(struct dw_edma_chunk *chunk, int i, u32 control, u32 size, u64 sar, u64 dar) { ptrdiff_t ofs = i * sizeof(struct dw_edma_v0_lli); + struct dw_edma_chan *chan = chunk->chan; if (chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) { - struct dw_edma_v0_lli *lli = chunk->ll_region.vaddr.mem + ofs; + struct dw_edma_v0_lli *lli = chan->ll_region.vaddr.mem + ofs; lli->transfer_size = size; lli->sar.reg = sar; @@ -290,7 +291,7 @@ static void dw_edma_v0_write_ll_data(struct dw_edma_chunk *chunk, int i, dma_wmb(); lli->control = control; } else { - struct dw_edma_v0_lli __iomem *lli = chunk->ll_region.vaddr.io + ofs; + struct dw_edma_v0_lli __iomem *lli = chan->ll_region.vaddr.io + ofs; writel(size, &lli->transfer_size); writeq(sar, &lli->sar.reg); @@ -303,15 +304,16 @@ static void dw_edma_v0_write_ll_link(struct dw_edma_chunk *chunk, int i, u32 control, u64 pointer) { ptrdiff_t ofs = i * sizeof(struct dw_edma_v0_lli); + struct dw_edma_chan *chan = chunk->chan; if (chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) { - struct dw_edma_v0_llp *llp = chunk->ll_region.vaddr.mem + ofs; + struct dw_edma_v0_llp *llp = chan->ll_region.vaddr.mem + ofs; llp->llp.reg = pointer; dma_wmb(); llp->control = control; } else { - struct dw_edma_v0_llp __iomem *llp = chunk->ll_region.vaddr.io + ofs; + struct dw_edma_v0_llp __iomem *llp = chan->ll_region.vaddr.io + ofs; writeq(pointer, &llp->llp.reg); writel(control, &llp->control); @@ -345,7 +347,7 @@ static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk) if (!chunk->cb) control |= DW_EDMA_V0_CB; - dw_edma_v0_write_ll_link(chunk, i, control, chunk->ll_region.paddr); + dw_edma_v0_write_ll_link(chunk, i, control, chan->ll_region.paddr); } static void dw_edma_v0_sync_ll_data(struct dw_edma_chunk *chunk) @@ -359,7 +361,7 @@ static void dw_edma_v0_sync_ll_data(struct dw_edma_chunk *chunk) * last MWr TLP is completed */ if (!(chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL)) - readl(chunk->ll_region.vaddr.io); + readl(chunk->chan->ll_region.vaddr.io); } static void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first) @@ -430,9 +432,9 @@ static void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first) /* Linked list */ /* llp is not aligned on 64bit -> keep 32bit accesses */ SET_CH_32(dw, chan->dir, chan->id, llp.lsb, - lower_32_bits(chunk->ll_region.paddr)); + lower_32_bits(chan->ll_region.paddr)); SET_CH_32(dw, chan->dir, chan->id, llp.msb, - upper_32_bits(chunk->ll_region.paddr)); + upper_32_bits(chan->ll_region.paddr)); } dw_edma_v0_sync_ll_data(chunk); diff --git a/drivers/dma/dw-edma/dw-hdma-v0-core.c b/drivers/dma/dw-edma/dw-hdma-v0-core.c index f1fc1060d3f77e3b12dea48efa72c5b3a0a58c8b..c12cc80c6c99697b50cf65a9720dab5a379dbe54 100644 --- a/drivers/dma/dw-edma/dw-hdma-v0-core.c +++ b/drivers/dma/dw-edma/dw-hdma-v0-core.c @@ -156,9 +156,10 @@ static void dw_hdma_v0_write_ll_data(struct dw_edma_chunk *chunk, int i, u32 control, u32 size, u64 sar, u64 dar) { ptrdiff_t ofs = i * sizeof(struct dw_hdma_v0_lli); + struct dw_edma_chan *chan = chunk->chan; if (chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) { - struct dw_hdma_v0_lli *lli = chunk->ll_region.vaddr.mem + ofs; + struct dw_hdma_v0_lli *lli = chan->ll_region.vaddr.mem + ofs; lli->transfer_size = size; lli->sar.reg = sar; @@ -166,7 +167,7 @@ static void dw_hdma_v0_write_ll_data(struct dw_edma_chunk *chunk, int i, dma_wmb(); lli->control = control; } else { - struct dw_hdma_v0_lli __iomem *lli = chunk->ll_region.vaddr.io + ofs; + struct dw_hdma_v0_lli __iomem *lli = chan->ll_region.vaddr.io + ofs; writel(size, &lli->transfer_size); writeq(sar, &lli->sar.reg); @@ -179,15 +180,16 @@ static void dw_hdma_v0_write_ll_link(struct dw_edma_chunk *chunk, int i, u32 control, u64 pointer) { ptrdiff_t ofs = i * sizeof(struct dw_hdma_v0_lli); + struct dw_edma_chan *chan = chunk->chan; if (chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) { - struct dw_hdma_v0_llp *llp = chunk->ll_region.vaddr.mem + ofs; + struct dw_hdma_v0_llp *llp = chan->ll_region.vaddr.mem + ofs; llp->llp.reg = pointer; dma_wmb(); llp->control = control; } else { - struct dw_hdma_v0_llp __iomem *llp = chunk->ll_region.vaddr.io + ofs; + struct dw_hdma_v0_llp __iomem *llp = chan->ll_region.vaddr.io + ofs; writeq(pointer, &llp->llp.reg); writel(control, &llp->control); @@ -210,7 +212,7 @@ static void dw_hdma_v0_core_write_chunk(struct dw_edma_chunk *chunk) if (!chunk->cb) control |= DW_HDMA_V0_CB; - dw_hdma_v0_write_ll_link(chunk, i, control, chunk->ll_region.paddr); + dw_hdma_v0_write_ll_link(chunk, i, control, chunk->chan->ll_region.paddr); } static void dw_hdma_v0_sync_ll_data(struct dw_edma_chunk *chunk) @@ -224,7 +226,7 @@ static void dw_hdma_v0_sync_ll_data(struct dw_edma_chunk *chunk) * last MWr TLP is completed */ if (!(chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL)) - readl(chunk->ll_region.vaddr.io); + readl(chunk->chan->ll_region.vaddr.io); } static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first) @@ -251,9 +253,9 @@ static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first) /* Linked list */ /* llp is not aligned on 64bit -> keep 32bit accesses */ SET_CH_32(dw, chan->dir, chan->id, llp.lsb, - lower_32_bits(chunk->ll_region.paddr)); + lower_32_bits(chan->ll_region.paddr)); SET_CH_32(dw, chan->dir, chan->id, llp.msb, - upper_32_bits(chunk->ll_region.paddr)); + upper_32_bits(chan->ll_region.paddr)); } /* Set consumer cycle */ SET_CH_32(dw, chan->dir, chan->id, cycle_sync, -- 2.34.1
