On Tue, Nov 17, 2015 at 11:51:10AM +0000, Will Deacon wrote:
> Hi Linus,
>
> On Mon, Nov 16, 2015 at 01:58:49PM -0800, Linus Torvalds wrote:
> > On Mon, Nov 16, 2015 at 8:24 AM, Will Deacon <will.dea...@arm.com> wrote:
> > >
> > > ... or we upgrade spin_unlock_wait to a LOCK operation, which might be
> > > slightly cheaper than spin_lock()+spin_unlock().
> >
> > So traditionally the real concern has been the cacheline ping-pong
> > part of spin_unlock_wait(). I think adding a memory barrier (that
> > doesn't force any exclusive states, just ordering) to it is fine, but
> > I don't think we want to necessarily have it have to get the cacheline
> > into exclusive state.
>
> The problem is, I don't think the memory-barrier buys you anything in
> the context of Boqun's example. In fact, he already had smp_mb() either
> side of the spin_unlock_wait() and its still broken on arm64 and ppc.
>
> Paul is proposing adding a memory barrier after spin_lock() in the racing
> thread, but I personally think people will forget to add that.
A mechanical check would certainly make me feel better about it, so that
any lock that was passed to spin_unlock_wait() was required to have all
acquisitions followed by smp_mb__after_unlock_lock() or some such.
But I haven't yet given up on finding a better solution.
Thanx, Paul
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