On 12/01/2015 09:32 PM, Heikki Krogerus wrote:
> Intel Braswell/Cherrytrail has an internal mux that shares
> one USB port between USB Device Controller and xHCI. The
> same mux is found on several SOCs from Intel, but only on
> a few Cherrytrail based platforms the OS is expected to
> configure it. Normally BIOS takes care of it.
>
> The driver for the mux is an "extcon" driver. With this we
> only register the mux if it's detected.
>
> Suggested-by: Lu Baolu <baolu...@linux.intel.com>
> Signed-off-by: Heikki Krogerus <heikki.kroge...@linux.intel.com>
> ---
> drivers/usb/host/pci-quirks.c | 30 +++++++++++++++++++++++++++++-
> 1 file changed, 29 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
> index f940056..4e3016a 100644
> --- a/drivers/usb/host/pci-quirks.c
> +++ b/drivers/usb/host/pci-quirks.c
> @@ -16,6 +16,7 @@
> #include <linux/export.h>
> #include <linux/acpi.h>
> #include <linux/dmi.h>
> +#include <linux/extcon/intel_usb_mux.h>
> #include "pci-quirks.h"
> #include "xhci-ext-caps.h"
>
> @@ -1029,9 +1030,36 @@ static void quirk_usb_handoff_xhci(struct pci_dev
> *pdev)
> writel(val, base + ext_cap_offset + XHCI_LEGACY_CONTROL_OFFSET);
>
> hc_init:
> - if (pdev->vendor == PCI_VENDOR_ID_INTEL)
> + if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
> usb_enable_intel_xhci_ports(pdev);
>
> + /*
> + * Initialize the internal mux that shares a port between USB
> + * Device Controller and xHCI on platforms that have it.
> + */
> +#define XHCI_INTEL_VENDOR_CAPS 192
> +#define XHCI_INTEL_USB_MUX_OFFSET 0x80d8
> + ext_cap_offset = xhci_find_next_cap_offset(base,
> + XHCI_HCC_PARAMS_OFFSET);
> + ext_cap_offset = xhci_find_ext_cap_by_id(base, ext_cap_offset,
> + XHCI_INTEL_VENDOR_CAPS);
Hi Heikki,
This helper has been replaced with xhci_find_next_ext_cap() in
commit d5ddcdf(xhci: rework xhci extended capability list parsing functions).
Need to fix this, otherwise it will not pass compile on top of usb-next.
Thanks,
Baolu
> + if (ext_cap_offset) {
> + struct intel_usb_mux *mux;
> + struct resource r;
> +
> + r.start = pci_resource_start(pdev, 0) +
> + XHCI_INTEL_USB_MUX_OFFSET;
> + r.end = r.start + 8;
> + r.flags = IORESOURCE_MEM;
> +
> + mux = intel_usb_mux_register(&pdev->dev, &r);
> + if (IS_ERR(mux) && PTR_ERR(mux) == -ENOTSUPP)
> + dev_dbg(&pdev->dev, "USB mux not supported\n");
> + else if (IS_ERR(mux))
> + dev_err(&pdev->dev, "failed to register mux\n");
> + }
> + }
> +
> op_reg_base = base + XHCI_HC_LENGTH(readl(base));
>
> /* Wait for the host controller to be ready before writing any
--
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