On Thu, Mar 17, 2016 at 07:43:42PM +1100, [email protected] wrote: > From: Yassin Jaffer <[email protected]> > > This patch adds a composite clock type consisting of > a clock gate, mux, configurable dividers, and a reset control. > > Signed-off-by: Yassin Jaffer <[email protected]> > --- > Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
I wish someone would just add all the sunxi clocks in one pass instead of one by one. Acked-by: Rob Herring <[email protected]> > drivers/clk/sunxi/Makefile | 1 + > drivers/clk/sunxi/clk-a10-csi.c | 188 > ++++++++++++++++++++++ > 3 files changed, 190 insertions(+) > create mode 100644 drivers/clk/sunxi/clk-a10-csi.c
