On 4/18/2016 11:59 AM, David Miller wrote: > From: ok...@codeaurora.org > Date: Mon, 18 Apr 2016 01:06:27 -0400 > >> On 2016-04-18 00:00, David Miller wrote: >>> From: Sinan Kaya <ok...@codeaurora.org> >>> Date: Sat, 16 Apr 2016 18:23:32 -0400 >>> >>>> Current code is assuming that the address returned by >>>> dma_alloc_coherent >>>> is a logical address. This is not true on ARM/ARM64 systems. This >>>> patch >>>> replaces dma_alloc_coherent with dma_map_page API. The address >>>> returned >>>> can later by virtually mapped from the CPU side with vmap API. >>>> Signed-off-by: Sinan Kaya <ok...@codeaurora.org> >>> You can't do this. >>> The DMA map page API gives non-coherent mappings, and thus requires >>> proper flushing. >>> So a straight conversion like this is never legitimate. >> >> I would agree on proper dma api usage. However, the code is already >> assuming coherent architecture by mapping the cpu pages as >> page_kernel. >> >> Dma_map_page returns cached buffers and you don't need cache flushes >> on coherent architecture to make the data visible. > > All you are telling me is that there are two bugs instead of one, so now > both need to be fixed. >
The removal of vmap also fixes the coherency assumption. It is one fix for both. I was thinking of submitting another patch to change the vmap argument PAGE_KERNEL based on the coherency support of the architecture. I don't need to do that anymore if the other experiment works. -- Sinan Kaya Qualcomm Technologies, Inc. on behalf of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project