On Tue, 2016-04-19 at 10:33 +0200, Alessio Igor Bogani wrote:
> Hi Scott,
>
> Thanks for reviewing it!
>
> On 19 April 2016 at 06:26, Scott Wood <o...@buserror.net> wrote:
> > On Mon, 2016-04-18 at 09:57 +0200, Alessio Igor Bogani wrote:
> > > + pci0: pcie@f1008000 {
> > > + reg = <0xf1008000 0x1000>;
> > > + ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0
> > > 0x50000000
> > > + 0x01000000 0x0 0x00000000 0xf0000000 0x0
> > > 0x00800000>;
> [...]
> > > +
> > > + pci1: pcie@f1009000 {
> > > + compatible = "fsl,mpc8641-pcie";
> > > + device_type = "pci";
> > > + #size-cells = <2>;
> > > + #address-cells = <3>;
> > > + reg = <0xf1009000 0x1000>;
> > > + bus-range = <0 0xff>;
> >
> > Why are pci0 and pci1 so different? Why does mpc8641si-post.dtsi not have
> > pci1?
>
> You are right. The MPC8641 processor offers two pci so
> mpc8641si-post.dtsi should be the right place where to define both.
> What about the boards which don't use the pci1? Will 'status =
> "disabled"' be enough?
Yes.
-Scott
