This series fixes a few small issues with support for External Interrupt Controllers (cpu_has_veic), ensuring that it is configured to service all interrupts by default & that when a GIC is present it's enabled when expected.
Applies atop v4.6. Paul Burton (3): MIPS: Clear Status IPL field when using EIC MIPS: smp-cps: Clear Status IPL field when using EIC irqchip: mips-gic: Setup EIC mode on each CPU if it's in use arch/mips/kernel/irq.c | 3 +++ arch/mips/kernel/smp-cps.c | 8 ++++++-- drivers/irqchip/irq-mips-gic.c | 10 +++++++++- 3 files changed, 18 insertions(+), 3 deletions(-) -- 2.8.2
