On Wed, Jun 08, 2016 at 06:02:16AM +0200, Lukasz Odzioba wrote: > For Knights Landing processor we need to filter OFFCORE_RESPONSE > events by config1 parameter to make sure that it will end up in > an appropriate PMC to meet specification. > > On Knights Landing: > MSR_OFFCORE_RSP_1 bits 8, 11, 14 can be used only on PMC1 > MSR_OFFCORE_RSP_0 bit 38 can be used only on PMC0 > > This patch introduces INTEL_EEVENT_CONSTRAINT where third parameter > specifies extended config bits allowed only on given PMCs. >
How does this work in the light of intel_alt_er() ?
